[PATCH v2] arm64: dts: rockchip: Add analog audio output on quartz64-b
Nicolas Frattaroli
frattaroli.nicolas at gmail.com
Thu Jul 21 01:33:00 PDT 2022
This adds the necessary device tree changes to enable analog
audio output on the PINE64 Quartz64 Model B with its RK809
codec.
The headphone detection pin is left out for now because I couldn't
get it to work and am not sure if it even matters, but for future
reference: It's pin GPIO4 RK_PC4, named HP_DET_L_GPIO4_C4 in the
schematic.
Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas at gmail.com>
---
Changes since v1:
- use generic node name for the simple-audio-card node
---
.../boot/dts/rockchip/rk3566-quartz64-b.dts | 32 ++++++++++++++++++-
1 file changed, 31 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-b.dts b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-b.dts
index 02d5f5a8ca03..3897980d69d1 100644
--- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-b.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-b.dts
@@ -42,6 +42,21 @@ led-user {
};
};
+ sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,name = "Analog RK809";
+ simple-audio-card,mclk-fs = <256>;
+
+ simple-audio-card,cpu {
+ sound-dai = <&i2s1_8ch>;
+ };
+
+ simple-audio-card,codec {
+ sound-dai = <&rk809>;
+ };
+ };
+
sdio_pwrseq: sdio-pwrseq {
status = "okay";
compatible = "mmc-pwrseq-simple";
@@ -177,11 +192,16 @@ rk809: pmic at 20 {
reg = <0x20>;
interrupt-parent = <&gpio0>;
interrupts = <RK_PA7 IRQ_TYPE_LEVEL_LOW>;
+ assigned-clocks = <&cru I2S1_MCLKOUT_TX>;
+ assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>;
+ clock-names = "mclk";
+ clocks = <&cru I2S1_MCLKOUT_TX>;
clock-output-names = "rk808-clkout1", "rk808-clkout2";
pinctrl-names = "default";
- pinctrl-0 = <&pmic_int>;
+ pinctrl-0 = <&pmic_int>, <&i2s1m0_mclk>;
rockchip,system-power-controller;
+ #sound-dai-cells = <0>;
wakeup-source;
#clock-cells = <1>;
@@ -420,6 +440,16 @@ &i2c5 {
status = "disabled";
};
+&i2s1_8ch {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2s1m0_sclktx
+ &i2s1m0_lrcktx
+ &i2s1m0_sdi0
+ &i2s1m0_sdo0>;
+ rockchip,trcm-sync-tx-only;
+ status = "okay";
+};
+
&mdio1 {
rgmii_phy1: ethernet-phy at 1 {
compatible = "ethernet-phy-ieee802.3-c22";
--
2.37.1
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