[PATCH v2 2/3] clk: fractional-divider: Introduce NO_PRESCALER flag
Liu Ying
victor.liu at nxp.com
Thu Jul 22 02:43:49 PDT 2021
On Thu, 2021-07-22 at 12:38 +0300, Andy Shevchenko wrote:
> On Thu, Jul 22, 2021 at 12:33 PM Liu Ying <victor.liu at nxp.com> wrote:
> > On Fri, 2021-07-16 at 16:34 +0300, Andy Shevchenko wrote:
> > > The newly introduced flag, when set, makes the flow to skip
> > > the assumption that the caller will use an additional 2^scale
> > > prescaler to get the desired clock rate.
> >
> > As I mentioned in v1 comment, it seems to be good to decouple the
> > prescaler knowledge from this common fractional divider clk driver.
> > This way, we'll make it simpler and easier to maintain. Also, then, the
> > NO_PRESCALER flag is not needed at all. However, it seems that two
> > Intel drivers which use the frational divider drivers will be affected
> > and rate negotiation logics need to be implemented for them. Please
> > consider if it's doable or not.
>
> The current driver works for the certain hardware without this change.
> If you think it's better, submit a proposal we will discuss.
Well, I'm not afford to do so. Just share an idea. I haven't got the
intel HW to test. As I mentioned in v1 comment, it seems that you have
experience on relevent drivers and HW to test, may I encourage you to
do that :-) Or forget that if you really think you won't do that.
>
> > If we ultimately keep the prescaler knowledge here, please consider to
> > add the NO_PRESCALER flag for i.MX7ulp as it hasn't the prescaler IIUC.
>
> You mean there is a code which is currently using this driver w/o
> taking into account this prescaller flavour? Can you, please, point
> out, I'll definitely update it. Thanks for the catch!
drivers/clk/imx/clk-composite-7ulp.c
Regards,
Liu Ying
>
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