[RFC PATCH v3 2/7] PCI: rockchip: introduce per-lanes PHYs support
Brian Norris
briannorris at chromium.org
Tue Jul 18 13:33:36 PDT 2017
Hi,
On Tue, Jul 18, 2017 at 03:56:58PM +0800, Shawn Lin wrote:
> We distinguish the legacy PHY with the newer per-lane
> PHYs by adding legacy_phy flag. Note that the legacy phy
> is still the first option to be searched in order not to
> break the backward compatibility of DTB.
>
> Signed-off-by: Shawn Lin <shawn.lin at rock-chips.com>
> Tested-by: Jeffy Chen <jeffy.chen at rock-chips.com>
> ---
>
> Changes in v3:
> - kill rockchip_pcie_manipulate_phys and related stuff
> - use phys array
> - improve the commit msg
>
> Changes in v2: None
>
> drivers/pci/host/pcie-rockchip.c | 100 +++++++++++++++++++++++++++------------
> 1 file changed, 69 insertions(+), 31 deletions(-)
>
> diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c
> index 6632a51..4cc6aec 100644
> --- a/drivers/pci/host/pcie-rockchip.c
> +++ b/drivers/pci/host/pcie-rockchip.c
...
> @@ -537,10 +579,12 @@ static int rockchip_pcie_init_port(struct rockchip_pcie *rockchip)
> return err;
> }
>
> - err = phy_init(rockchip->phy);
> - if (err < 0) {
> - dev_err(dev, "fail to init phy, err %d\n", err);
> - return err;
> + for (i = 0; i < MAX_LANE_NUM; i++) {
> + err = phy_init(rockchip->phys[i]);
> + if (err) {
> + dev_err(dev, "init phy err %d\n", err);
Include the PHY index in the error message?
> + return err;
> + }
> }
>
> err = reset_control_assert(rockchip->core_rst);
> @@ -602,10 +646,12 @@ static int rockchip_pcie_init_port(struct rockchip_pcie *rockchip)
> PCIE_CLIENT_MODE_RC,
> PCIE_CLIENT_CONFIG);
>
> - err = phy_power_on(rockchip->phy);
> - if (err) {
> - dev_err(dev, "fail to power on phy, err %d\n", err);
> - return err;
> + for (i = 0; i < MAX_LANE_NUM; i++) {
> + err = phy_power_on(rockchip->phys[i]);
> + if (err) {
> + dev_err(dev, "power on phy err %d\n", err);
Same?
> + return err;
> + }
> }
>
> /*
...
Brian
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