[PATCH v7 3/4] usb: dwc2: assert phy reset when waking up in rk3288 platform

[Ayaka]

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> John Youn <John.Youn at synopsys.com> 於 2016年9月7日 上午2:54 寫道：
> 
>> On 9/5/2016 10:15 PM, Kishon Vijay Abraham I wrote:
>> Hi,
>> 
>>> On Sunday 04 September 2016 03:25 AM, Randy Li wrote:
>>> On the rk3288 USB host-only port (the one that's not the OTG-enabled
>>> port) the PHY can get into a bad state when a wakeup is asserted (not
>>> just a wakeup from full system suspend but also a wakeup from
>>> autosuspend).
>>> 
>>> We can get the PHY out of its bad state by asserting its "port reset",
>>> but unfortunately that seems to assert a reset onto the USB bus so it
>>> could confuse things if we don't actually deenumerate / reenumerate the
>>> device.
>>> 
>>> We can also get the PHY out of its bad state by fully resetting it using
>>> the reset from the CRU (clock reset unit) in chip, which does a more full
>>> reset.  The CRU-based reset appears to actually cause devices on the bus
>>> to be removed and reinserted, which fixes the problem (albeit in a hacky
>>> way).
>>> 
>>> It's unfortunate that we need to do a full re-enumeration of devices at
>>> wakeup time, but this is better than alternative of letting the bus get
>>> wedged.
>>> 
>>> Signed-off-by: Randy Li <ayaka at soulik.info>
>>> ---
>>> drivers/usb/dwc2/core_intr.c | 12 ++++++++++++
>>> 1 file changed, 12 insertions(+)
>>> 
>>> diff --git a/drivers/usb/dwc2/core_intr.c b/drivers/usb/dwc2/core_intr.c
>>> index d85c5c9..08485b7 100644
>>> --- a/drivers/usb/dwc2/core_intr.c
>>> +++ b/drivers/usb/dwc2/core_intr.c
>>> @@ -345,6 +345,7 @@ static void dwc2_handle_session_req_intr(struct dwc2_hsotg *hsotg)
>>> static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg)
>>> {
>>>    int ret;
>>> +    struct device_node *np = hsotg->dev->of_node;
>>> 
>>>    /* Clear interrupt */
>>>    dwc2_writel(GINTSTS_WKUPINT, hsotg->regs + GINTSTS);
>>> @@ -379,6 +380,17 @@ static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg)
>>>            /* Restart the Phy Clock */
>>>            pcgcctl &= ~PCGCTL_STOPPCLK;
>>>            dwc2_writel(pcgcctl, hsotg->regs + PCGCTL);
>>> +
>>> +            /*
>>> +             * It is a quirk in Rockchip RK3288, causing by
>>> +             * a hardware bug. This will propagate out and
>>> +             * eventually we'll re-enumerate the device. 
>>> +             * Not great but the best we can do 
>>> +             */
>>> +            if (of_device_is_compatible(np, "rockchip,rk3288-usb")
>>> +                    && (NULL != hsotg->phy->ops->reset))
>>> +                hsotg->phy->ops->reset(hsotg->phy);
>> 
>> never call the phy ops directly from the controller driver. It has to be
>> protected as well.
> 
> It looks like we should be calling an API function instead, correct?
> 
Could you give me a example for the wrapper of phy ops?
> Similar to the wrappers for the other ops.
> 
> Regards,
> John