[PATCH v3 1/3] dt-bindings: add documentation for rk1108 cru

Rob Herring robh at kernel.org
Fri Nov 18 06:03:13 PST 2016


On Wed, Nov 16, 2016 at 04:49:21PM +0800, Shawn Lin wrote:
> This adds the dt-binding documentation for the clock and reset unit
> found on Rockchip rk1108 SoCs.
> 
> Signed-off-by: Shawn Lin <shawn.lin at rock-chips.com>
> 
> ---
> 
> Changes in v3:
> - fix mismatch of external clk input name
> - add hdmiphy and usbphy clk input
> 
> Changes in v2: None
> 
>  .../bindings/clock/rockchip,rk1108-cru.txt         | 59 ++++++++++++++++++++++
>  1 file changed, 59 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/clock/rockchip,rk1108-cru.txt
> 
> diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk1108-cru.txt b/Documentation/devicetree/bindings/clock/rockchip,rk1108-cru.txt
> new file mode 100644
> index 0000000..4da1261
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/rockchip,rk1108-cru.txt
> @@ -0,0 +1,59 @@
> +* Rockchip RK1108 Clock and Reset Unit
> +
> +The RK1108 clock controller generates and supplies clock to various
> +controllers within the SoC and also implements a reset controller for SoC
> +peripherals.
> +
> +Required Properties:
> +
> +- compatible: should be "rockchip,rk1108-cru"
> +- reg: physical base address of the controller and length of memory mapped
> +  region.
> +- #clock-cells: should be 1.
> +- #reset-cells: should be 1.
> +
> +Optional Properties:
> +
> +- rockchip,grf: phandle to the syscon managing the "general register files"
> +  If missing pll rates are not changeable, due to the missing pll lock status.
> +
> +Each clock is assigned an identifier and client nodes can use this identifier
> +to specify the clock which they consume. All available clocks are defined as
> +preprocessor macros in the dt-bindings/clock/rk1108-cru.h headers and can be
> +used in device tree sources. Similar macros exist for the reset sources in
> +these files.
> +
> +External clocks:
> +
> +There are several clocks that are generated outside the SoC. It is expected
> +that they are defined using standard clock bindings with following
> +clock-output-names:

This stilll doesn't seem right. These are inputs to the CRU or 
completely separate? If inputs, then you need a 'clocks' property. If 
completely separate, then they should be listed in their respective IP 
block binding (e.g. the USB phy).

> + - "xin24m" - crystal input - required,
> + - "ext_vip" - external VIP clock - optional
> + - "ext_i2s" - external I2S clock - optional
> + - "ext_gmac" - external GMAC clock - optional
> + - "hdmiphy" - external clock input derived from HDMI PHY - optional
> + - "usbphy" - external clock input derived from USB PHY - optional
> +
> +Example: Clock controller node:
> +
> +	cru: cru at 20200000 {
> +		compatible = "rockchip,rk1108-cru";
> +		reg = <0x20200000 0x1000>;
> +		rockchip,grf = <&grf>;
> +
> +		#clock-cells = <1>;
> +		#reset-cells = <1>;
> +	};
> +
> +Example: UART controller node that consumes the clock generated by the clock
> +  controller:
> +
> +	uart0: serial at 10230000 {
> +		compatible = "rockchip,rk1108-uart", "snps,dw-apb-uart";
> +		reg = <0x10230000 0x100>;
> +		interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
> +		reg-shift = <2>;
> +		reg-io-width = <4>;
> +		clocks = <&cru SCLK_UART0>;
> +	};
> -- 
> 1.9.1
> 
> 



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