[RFC PATCH 1/2] drm: add a helper function to check availbility of coherent mapping

[Icenowy Zheng]

On some early SiFive RISC-V cores, there're no architectural way to map
the framebuffer coherently (bypassing the cache).

Add a helper function to check this situation for drivers to enable
dirty-tracking-based cache maintenance, which is more than returning
true currently on all architectures other than RISC-V.

Signed-off-by: Icenowy Zheng <zhengxingda at iscas.ac.cn>
---
 include/drm/drm_cache.h | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/include/drm/drm_cache.h b/include/drm/drm_cache.h
index 08e0e3ffad131..001a6d89afead 100644
--- a/include/drm/drm_cache.h
+++ b/include/drm/drm_cache.h
@@ -34,6 +34,9 @@
 #define _DRM_CACHE_H_
 
 #include <linux/scatterlist.h>
+#if defined(CONFIG_RISCV)
+#include <linux/pgtable.h>
+#endif
 
 struct iosys_map;
 
@@ -80,6 +83,24 @@ static inline bool drm_arch_can_wc_memory(void)
 #endif
 }
 
+static inline bool drm_arch_can_map_coherent(void)
+{
+#if defined(CONFIG_RISCV)
+	/*
+	 * Early ratified versions of RISC-V privileged architecture manual
+	 * lacks any standardized way to override the cacheability of the
+	 * main memory region, from which framebuffers are allocated.
+	 *
+	 * In this case pgprot_writecombine() would just be a noop and manual
+	 * cache maintenance is required.
+	 */
+	return pgprot_val(pgprot_writecombine(PAGE_KERNEL)) !=
+	       pgprot_val(PAGE_KERNEL);
+#else
+	return true;
+#endif
+}
+
 void drm_memcpy_init_early(void);
 
 void drm_memcpy_from_wc(struct iosys_map *dst,
-- 
2.55.0