[PATCH 3/4] riscv: dts: spacemit: k3-com260-ifx: Add PCIe nodes

[Jennifer Berringer]

K3 CoM260 Dev Kit uses PCIe for three M.2 slots:

- M.2 M-key 2280: PCIe 3.0 x4 (pcie0_rc)
- M.2 M-key 2230: PCIe 3.0 x1+1 (pcie3_rc)
- M.2 E-key 2230: PCIe 3.0 x1 (pcie4_rc)

The M.2 M-key 2230 slot is connected to two PCIe lanes, with lane 0
on combo phy 4 and lane 1 on combo phy 3. The K3 combo phy cannot be
configured to use these as one PCIe 3.0 x2 device; treat this slot as x1
only instead.

The E-key slot has an RTL8852BE WiFi+BT NIC installed from factory.

Signed-off-by: Jennifer Berringer <jberring at redhat.com>
---
 .../riscv/boot/dts/spacemit/k3-com260-ifx.dts | 45 +++++++++++++++++++
 arch/riscv/boot/dts/spacemit/k3-pinctrl.dtsi  | 33 ++++++++++++++
 2 files changed, 78 insertions(+)

diff --git a/arch/riscv/boot/dts/spacemit/k3-com260-ifx.dts b/arch/riscv/boot/dts/spacemit/k3-com260-ifx.dts
index a4dfa25c837fe..01e286cb05797 100644
--- a/arch/riscv/boot/dts/spacemit/k3-com260-ifx.dts
+++ b/arch/riscv/boot/dts/spacemit/k3-com260-ifx.dts
@@ -39,6 +39,14 @@ reg_vbus_5v: regulator-usb3-vbus-5v {
 		gpio = <&gpio K3_GPIO(67) GPIO_ACTIVE_HIGH>;
 		enable-active-high;
 	};
+
+	reg_aux_vcc3v3: regulator-aux-vcc3v3 {
+		compatible = "regulator-fixed";
+		regulator-name = "AUX_VCC3V3";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-always-on;
+	};
 };
 
 &combophy {
@@ -61,6 +69,43 @@ eeprom at 50 {
 	};
 };
 
+&pcie0_rc {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pcie0_1_cfg>;
+	num-lanes = <4>;
+	status = "okay";
+
+	pcie at 0 {
+		vpcie3v3-supply = <&reg_aux_vcc3v3>;
+		phys = <&combophy 0 PHY_TYPE_PCIE>,
+		       <&combophy 1 PHY_TYPE_PCIE>;
+	};
+};
+
+&pcie3_rc {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pcie3_0_cfg>;
+	num-lanes = <1>;
+	status = "okay";
+
+	pcie at 0 {
+		vpcie3v3-supply = <&reg_aux_vcc3v3>;
+		phys = <&combophy 4 PHY_TYPE_PCIE>;
+	};
+};
+
+&pcie4_rc {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pcie4_1_cfg>;
+	num-lanes = <1>;
+	status = "okay";
+
+	pcie at 0 {
+		vpcie3v3-supply = <&reg_aux_vcc3v3>;
+		phys = <&combophy 5 PHY_TYPE_PCIE>;
+	};
+};
+
 &usb2_host {
 	status = "okay";
 };
diff --git a/arch/riscv/boot/dts/spacemit/k3-pinctrl.dtsi b/arch/riscv/boot/dts/spacemit/k3-pinctrl.dtsi
index 1b19979f150ce..36f7780860f50 100644
--- a/arch/riscv/boot/dts/spacemit/k3-pinctrl.dtsi
+++ b/arch/riscv/boot/dts/spacemit/k3-pinctrl.dtsi
@@ -800,6 +800,17 @@ pcie0-0-pins {
 		};
 	};
 
+	pcie0_1_cfg: pcie0-1-cfg {
+		pcie0-0-pins {
+			pinmux = <K3_PADCONF(79, 5)>,   /* pcie0 perst */
+				 <K3_PADCONF(81, 5)>;	/* pcie0 clkreq */
+
+			bias-pull-up = <1>;
+			drive-strength = <38>;
+			power-source = <3300>;
+		};
+	};
+
 	pcie2_0_cfg: pcie2-0-cfg {
 		pcie2-0-pins {
 			pinmux = <K3_PADCONF(25, 4)>,	/* pcie2 perst */
@@ -810,6 +821,17 @@ pcie2-0-pins {
 		};
 	};
 
+	pcie3_0_cfg: pcie3-0-cfg {
+		pcie3-0-pins {
+			pinmux = <K3_PADCONF(3, 4)>,	/* pcie3 perst */
+				 <K3_PADCONF(5, 4)>;	/* pcie3 clkreq */
+
+			bias-pull-up = <1>;
+			drive-strength = <38>;
+			power-source = <3300>;
+		};
+	};
+
 	pcie4_0_cfg: pcie4-0-cfg {
 		pcie4-0-pins {
 			pinmux = <K3_PADCONF(76, 5)>,	/* pcie4 perst */
@@ -821,4 +843,15 @@ pcie4-0-pins {
 			power-source = <1800>;
 		};
 	};
+
+	pcie4_1_cfg: pcie4-1-cfg {
+		pcie4-0-pins {
+			pinmux = <K3_PADCONF(76, 5)>,	/* pcie4 perst */
+				 <K3_PADCONF(78, 5)>;	/* pcie4 clkreq */
+
+			bias-pull-up = <1>;
+			drive-strength = <38>;
+			power-source = <3300>;
+		};
+	};
 };
-- 
2.55.0