[PATCH 17/18] riscv: defconfig: enable A210 support

[Conor Dooley]

On Thu, Oct 22, 2026 at 03:53:37AM +0800, Han Gao via B4 Relay wrote:
> From: Han Gao <gaohan at iscas.ac.cn>
> 
> Enable A210 platform drivers and reserve ten 8250 UART ports.
> 
> Signed-off-by: Han Gao <gaohan at iscas.ac.cn>
> ---
>  arch/riscv/configs/defconfig | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
> index 04ae305d5511..b9b3bca12089 100644
> --- a/arch/riscv/configs/defconfig
> +++ b/arch/riscv/configs/defconfig
> @@ -33,6 +33,7 @@ CONFIG_SOC_STARFIVE=y
>  CONFIG_ARCH_SUNXI=y
>  CONFIG_ARCH_TENSTORRENT=y
>  CONFIG_ARCH_THEAD=y
> +CONFIG_ARCH_ZHIHE=y
>  CONFIG_ARCH_ULTRARISC=y
>  CONFIG_ARCH_VIRT=y
>  CONFIG_ARCH_CANAAN=y
> @@ -149,6 +150,8 @@ CONFIG_KEYBOARD_GPIO=y
>  CONFIG_KEYBOARD_SUN4I_LRADC=m
>  CONFIG_SERIAL_8250=y
>  CONFIG_SERIAL_8250_CONSOLE=y
> +CONFIG_SERIAL_8250_NR_UARTS=10
> +CONFIG_SERIAL_8250_RUNTIME_UARTS=10

Why are these options needed?

>  CONFIG_SERIAL_8250_DW=y
>  CONFIG_SERIAL_OF_PLATFORM=y
>  CONFIG_SERIAL_EARLYCON_RISCV_SBI=y
> @@ -167,6 +170,7 @@ CONFIG_SPI_PL022=m
>  CONFIG_SPI_SIFIVE=y
>  CONFIG_SPI_SUN6I=y
>  # CONFIG_PTP_1588_CLOCK is not set
> +CONFIG_PINCTRL_A210=y
>  CONFIG_PINCTRL_TH1520=y
>  CONFIG_PINCTRL_SOPHGO_CV1800B=y
>  CONFIG_PINCTRL_SOPHGO_CV1812H=y
> 
> -- 
> 2.55.0
> 
> 
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