[PATCH v2 2/2] riscv: dts: spacemit: mark K1 board boot devices bootph-pre-ram

[Yixun Lan]

Hi Hung-Chun,

On 22:17 Mon 19 Oct     , Hung-Chun Tseng wrote:
> Hi E,
> 
> E Shattow wrote:
> > Does BootROM configure the EEPROM peripheral for access? If not, I
> > think the justification is weak here to include this.
> 
> As far as I know it does not. The EEPROM is only read to tell the
> boards apart, so I will drop the i2c2 and EEPROM tags in v3 and keep
> the PMIC, whose rails are set before DRAM can be brought up, and the
> SPI NOR flash, which the BootROM can boot from.
> 
I've confirmed with vendor, the EEPROM isn't configured or accessed in
BootROM phase

> Yixun, is there a public description of the BootROM boot flows, or of
> which peripherals it sets up in each? That would give a clear basis
> for which nodes to tag.
> 
The ever closest docs is 
https://spacemit.com/community/document/info?lang=zh&nodepath=software/SDK/buildroot/k3_buildroot/device/boot.md

but for bootph-pre-ram, isn't it about the DT nodes which needed before DDR
initialization in SPL stage, and should have nothing to do with BootROM?
https://github.com/devicetree-org/dt-schema/blob/main/dtschema/schemas/bootph.yaml#L70

-- 
Yixun Lan (dlan)