[PATCH] riscv: signal: protect regs->status RMW from concurrent preemption

Guobin Zhang guobin.zhang at intel.com
Tue Oct 20 03:03:20 PDT 2026


Hi Andy,

Thanks for the review and the suggested approach. I'll send a v2 that
disables preemption at the fstate_save()/fstate_restore() level and
adds the fstate_{save,restore}_preempt_off() variants for the scheduler
and kernel_mode_fpu.

Thanks,
Guobin



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