[PATCH v2] riscv: mm: Trace TLB flush path selection

[Roman Storozhenko]

On Sat, Oct 17, 2026 at 3:55 PM Roman Storozhenko
<romeusmeister at gmail.com> wrote:
>
> On Fri, Oct 16, 2026 at 4:36 PM Steven Rostedt <rostedt at goodmis.org> wrote:
> >
> > On Sun, 30 Aug 2026 16:36:37 +0200
> > Roman 'Hedin' Storozhenko <romeusmeister at gmail.com> wrote:
> >
> > > diff --git a/include/trace/events/riscv_tlb.h b/include/trace/events/riscv_tlb.h
> >
> > Please do not put architecture specific events in include/trace.
> >
> > They belong in the architecture.
> >
> > See the example code in samples/trace_events/trace-events-sample.[ch]
> > as well as the Makefile there on how to put trace events in directories
> > outside of include/trace/
> >
> > Thanks,
> >
> > -- Steve
> >
>
> Hi Steve,
>
> Thanks for the review.
>
> I've moved the trace event definition to
> arch/riscv/include/asm/riscv_tlb.h in v5, following the existing
> RISC-V tracepoint convention.
>
> The updated patch is available here:
> https://lore.kernel.org/linux-riscv/20261017-tlb_tracepoint-v5-1-256fb5393a7f@gmail.com/
>
> Thanks for pointing this out.

Hi Steve,
I've posted v6 with an additional fix for
the alignment of the dynamically stored CPU mask.

The trace event definition remains under
arch/riscv/include/asm/riscv_tlb.h, as in v5.

The updated patch is available here:
https://lore.kernel.org/linux-riscv/20261018-tlb_tracepoint-v6-1-14476427870f@gmail.com/T/#u

>
> --
> Kind regards,
> Roman 'Hedin' Storozhenko

-- 
Kind regards,
Roman 'Hedin' Storozhenko