[RFC PATCH v2 3/4] iommu/riscv: Add guest IMSIC GPA mapping helpers

[Jason Gunthorpe]

On 2026-10-14 22:11 +0800, fangyu.yu at linux.alibaba.com wrote:
> From: Fangyu Yu <fangyu.yu at linux.alibaba.com>
> 
> IOMMU implementations without the MSI_FLAT capability translate MSI
> writes through the second-stage page table, so IRQ forwarding on them
> will need guest IMSIC pages mapped into the second-stage domain.
> 
> Add an xarray to the MSI table that tracks the HPA installed for each
> mapped guest IMSIC GPA, and two helpers for use with the MSI table lock
> held: riscv_iommu_msi_table_map_gpa() installs the initial 4 KiB
> mapping, and riscv_iommu_msi_table_replace_gpa() repoints the leaf PTE
> when a vCPU's VS-file host page moves, using the generic page table
> replace_leaf op instead of walking the table in the driver.
> 
> Signed-off-by: Fangyu Yu <fangyu.yu at linux.alibaba.com>
> ---
>  drivers/iommu/riscv/iommu.c | 43 +++++++++++++++++++++++++++++++++++++
>  drivers/iommu/riscv/iommu.h | 12 +++++++++++
>  2 files changed, 55 insertions(+)
> 
> diff --git a/drivers/iommu/riscv/iommu.c b/drivers/iommu/riscv/iommu.c
> index e2e77469ea3c..88e131ce96c1 100644
> --- a/drivers/iommu/riscv/iommu.c
> +++ b/drivers/iommu/riscv/iommu.c
> @@ -1217,6 +1217,42 @@ void riscv_iommu_msi_table_inval_all(struct riscv_iommu_msi_table *msi_table)
>  	riscv_iommu_iotlb_inval(domain, &gather);
>  }
>  
> +int riscv_iommu_msi_table_map_gpa(struct riscv_iommu_msi_table *msi_table,
> +				  dma_addr_t gpa, phys_addr_t hpa)
> +{
> +	struct riscv_iommu_domain *domain =
> +		container_of(msi_table, struct riscv_iommu_domain, msi_table);
> +	const int prot = IOMMU_WRITE | IOMMU_NOEXEC | IOMMU_MMIO;
> +
> +	/* Guest IMSIC GPA mapping only exists in second-stage translations. */
> +	if (!domain->gscid)
> +		return -EOPNOTSUPP;
> +
> +	return iommu_map(&domain->domain, gpa, hpa, IMSIC_MMIO_PAGE_SZ, prot,
> +			 GFP_ATOMIC);
> +}

Andrew has moved well past a v3

I shouldn't be seeing code in iommu or irq drivers directly mapping into
domains. That doesn't work, Andrew's latest series don't do this.

It still needs to use the SW_MSI mechanism and related.

Nothing in the commit messages clearly explained what this is actually for
without having to go dig up the riscv manuals again. Please explain how the
interrupt translation works and what actual user visible problem this is
trying to solve is.

-- 
Jason