[PATCH 3/3] riscv: dts: sophgo: sg2044: Add eFUSE device
Inochi Amaoto
inochiama at gmail.com
Wed Oct 14 00:45:15 PDT 2026
Add eFUSE controller node for SG2044.
Signed-off-by: Inochi Amaoto <inochiama at gmail.com>
---
arch/riscv/boot/dts/sophgo/sg2044-sophgo-srd3-10.dts | 4 ++++
arch/riscv/boot/dts/sophgo/sg2044.dtsi | 12 ++++++++++++
drivers/nvmem/sophgo-efuse.c | 1 +
3 files changed, 17 insertions(+)
diff --git a/arch/riscv/boot/dts/sophgo/sg2044-sophgo-srd3-10.dts b/arch/riscv/boot/dts/sophgo/sg2044-sophgo-srd3-10.dts
index fed3d9a384a0..1b506972d465 100644
--- a/arch/riscv/boot/dts/sophgo/sg2044-sophgo-srd3-10.dts
+++ b/arch/riscv/boot/dts/sophgo/sg2044-sophgo-srd3-10.dts
@@ -36,6 +36,10 @@ &emmc {
status = "okay";
};
+&efuse0 {
+ status = "okay";
+};
+
&gmac0 {
phy-handle = <&phy0>;
phy-mode = "rgmii-id";
diff --git a/arch/riscv/boot/dts/sophgo/sg2044.dtsi b/arch/riscv/boot/dts/sophgo/sg2044.dtsi
index 320c4d1d08e6..9577aae08f7f 100644
--- a/arch/riscv/boot/dts/sophgo/sg2044.dtsi
+++ b/arch/riscv/boot/dts/sophgo/sg2044.dtsi
@@ -408,6 +408,18 @@ sd: mmc at 703000b000 {
status = "disabled";
};
+ efuse0: efuse at 7040000000 {
+ compatible = "sophgo,sg2044-efuse";
+ reg = <0x70 0x40000000 0x0 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&clk CLK_GATE_EFUSE>,
+ <&clk CLK_GATE_APB_EFUSE>;
+ clock-names = "core", "apb";
+ resets = <&rst RST_EFUSE0>;
+ status = "disabled";
+ };
+
i2c0: i2c at 7040005000 {
compatible = "sophgo,sg2044-i2c", "snps,designware-i2c";
reg = <0x70 0x40005000 0x0 0x1000>;
diff --git a/drivers/nvmem/sophgo-efuse.c b/drivers/nvmem/sophgo-efuse.c
index 5f90adaf8e4f..568d17b88ff6 100644
--- a/drivers/nvmem/sophgo-efuse.c
+++ b/drivers/nvmem/sophgo-efuse.c
@@ -14,6 +14,7 @@
#include <linux/mutex.h>
#include <linux/nvmem-provider.h>
#include <linux/platform_device.h>
+#include <linux/slab.h>
#define SG2044_EFUSE_CONTENT_SIZE 0x400
--
2.56.0
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