[PATCH v2 2/2] RISC-V: make use of variadic sbi_ecall

Radim Krcmar rkrcmar at qti.qualcomm.com
Wed Oct 7 02:28:58 PDT 2026


2026-10-06T03:55:12-06:00, Paul Walmsley <pjw at kernel.org>:
> On Thu, 19 Jun 2025, Radim Krčmář wrote:
>
>> The new sbi_ecall doesn't have to list all 8 arguments anymore, so only
>> pass the actual numbers of arguments for each SBI function.
>> 
>> The remaining trailing 0 are intentional as they represent an argument.
>> 
>> SBI 0.1 shouldn't be using the sbi_ecall, because it's only for 0.2+,
>> but allow it by passing 0 is the reserved register.
>> 
>> Signed-off-by: Radim Krčmář <rkrcmar at ventanamicro.com>
>
> Thanks, queued for v7.4.  
>
> For everyone, not just Radim - probably it's worth looking through the 
> codebase to convert any SBI ecalls that were added over the past year that 
> weren't covered by this patch (e.g., the MPXY drivers) and to doublecheck 
> the overall argument counts.

I started working on a followup and noticed a bug.

Please squash the following change or just drop the second patch, since
we may be touching the same lines again soon, sorry about that.

---
diff --git a/arch/riscv/kernel/sbi.c b/arch/riscv/kernel/sbi.c
index 8f3989f11ad4..af1ccea222f1 100644
--- a/arch/riscv/kernel/sbi.c
+++ b/arch/riscv/kernel/sbi.c
@@ -605,7 +605,7 @@ int sbi_debug_console_write(const char *bytes, unsigned int num_bytes)
 				upper_32_bits(base_addr));
 	else
 		ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_WRITE,
-				num_bytes, base_addr);
+				num_bytes, base_addr, 0);
 
 	if (ret.error == SBI_ERR_FAILURE)
 		return -EIO;
@@ -634,7 +634,7 @@ int sbi_debug_console_read(char *bytes, unsigned int num_bytes)
 				upper_32_bits(base_addr));
 	else
 		ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_READ,
-				num_bytes, base_addr);
+				num_bytes, base_addr, 0);
 
 	if (ret.error == SBI_ERR_FAILURE)
 		return -EIO;
-- 
2.55.0


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