[PATCH v5 0/5] riscv: Use Zalasr for acquire and release operations

[Qingwei Hu]

The Zalasr extension provides load-acquire and store-release
instructions. The base ISA parsing, hwprobe, instruction definitions,
and KVM support from v4 are already upstream. This series resubmits only
the acquire/release optimizations that were left out.

The v4 implementation could mix fence-based and aq/rl mappings. That
combination does not provide the RCsc ordering expected by Linux locking
primitives unless the fence-based side is strengthened. It also needs to
preserve the existing lowering on systems without Zalasr.

Strengthen the remaining fence-based fallbacks on Zalasr systems before
introducing annotated operations. Then use Zalasr for acquire loads,
release stores, xchg, cmpxchg, and generic atomic acquire/release
operations. Also use acquire loads in smp_cond_load_acquire() so the
satisfying load provides the required ordering.

Systems without Zalasr retain the existing lowering. Uniprocessor builds
keep their existing plain AMO sequences where no inter-CPU ordering is
required.

Changes in v5:
- Drop the base ISA, hwprobe, instruction definition, and KVM patches
  that are already upstream.
- Add a preparatory patch that strengthens fence-based fallbacks when
  they can be paired with Zalasr acquire or release operations.
- Select aq/rl annotations only when Zalasr is available and preserve
  the non-Zalasr lowering.
- Optimize smp_cond_load_acquire() with Zalasr acquire loads.
- Rework xchg, cmpxchg, and atomic operations around the current
  RISC-V atomic macros.

v4:
https://lore.kernel.org/r/20251020042056.30283-1-luxu.kernel@bytedance.com

---

Qingwei Hu (1):
  riscv: Strengthen fallback barriers with Zalasr

Xu Lu (3):
  riscv: Apply Zalasr to smp_load_acquire/smp_store_release
  riscv: Use Zalasr for xchg and cmpxchg ordering
  riscv: Use Zalasr for atomic acquire and release operations

Yunhui Cui (1):
  riscv: Optimize smp_cond_load_acquire() with Zalasr

 arch/riscv/include/asm/atomic.h  |  84 ++++++++++++++-
 arch/riscv/include/asm/barrier.h |  97 ++++++++++++++++-
 arch/riscv/include/asm/cmpxchg.h | 179 ++++++++++++++++++++-----------
 arch/riscv/include/asm/fence.h   |   9 ++
 4 files changed, 298 insertions(+), 71 deletions(-)


base-commit: 4982d3552a3bf94de503acf93433277d08421de6
-- 
2.39.5