[PATCH v2 0/2] riscv: dts: anlogic: dr1v90: fix clock dtbs_check errors
Junhui Liu
junhui.liu at pigmoral.tech
Fri Oct 2 09:28:38 PDT 2026
The external CAN and watchdog clocks are optional board-level inputs to
the DR1V90 CRU. The current binding requires both inputs, causing the
common SoC device tree to provide fixed-clock placeholders without the
required clock-frequency property. Consequently, dtbs_check reports:
arch/riscv/boot/dts/anlogic/dr1v90-mlkpai-fs01.dtb: clock-ext-can (fixed-clock): 'clock-frequency' is a required property
from schema $id: http://devicetree.org/schemas/clock/fixed-clock.yaml
arch/riscv/boot/dts/anlogic/dr1v90-mlkpai-fs01.dtb: clock-ext-wdt (fixed-clock): 'clock-frequency' is a required property
from schema $id: http://devicetree.org/schemas/clock/fixed-clock.yaml
Make the external clocks optional in the binding, then remove the unused
placeholders from the common device tree. Both muxes select their internal
clock parents after reset, so boards without the external inputs continue
to operate normally. Boards that route either input can describe the
corresponding clock in their board-level device tree.
Based on linux-next (next-20261001). The issue was introduced by the
original series [1].
Link: https://lore.kernel.org/all/20260514-dr1v90-cru-v5-0-34f3021aab51@pigmoral.tech [1]
Signed-off-by: Junhui Liu <junhui.liu at pigmoral.tech>
---
Changes in v2:
- Update the binding to clarify the clocks description and simplify the
clock-names constraints
- Collect tags
- Link to v1: https://patch.msgid.link/20261002-dr1v90-cru-dt-fix-v1-0-c3e0b5d4c30d@pigmoral.tech
---
Junhui Liu (2):
dt-bindings: clock: anlogic,dr1v90-cru: make external clocks optional
riscv: dts: anlogic: drop unused DR1V90 external clocks
.../devicetree/bindings/clock/anlogic,dr1v90-cru.yaml | 12 +++++++-----
arch/riscv/boot/dts/anlogic/dr1v90.dtsi | 16 ++--------------
2 files changed, 9 insertions(+), 19 deletions(-)
---
base-commit: 9f24d789f03b22941b905ded43cb5ff8eea9ce62
change-id: 20261002-dr1v90-cru-dt-fix-0463cfa1a104
Best regards,
--
Junhui Liu <junhui.liu at pigmoral.tech>
More information about the linux-riscv
mailing list