[PATCH v2 2/4] riscv: dts: thead: add Milk-V Meles

[Han Gao]

Add the Milk-V Meles board with UART0, eMMC, SD, Ethernet and the PWM2
fan. Describe the board pin assignments and the PHY on the GMAC0 MDIO
bus. Give GPIO banks aliases and name the exposed 40-pin header lines.

The eMMC I/O supply is fixed at 1.8 V. Enable DDR52 at that voltage and
retain the 52 MHz board limit. Describe 8 GiB as the default memory
size; firmware updates it to match the detected RAM capacity.

Reviewed-by: Drew Fustini <fustini at kernel.org>
Signed-off-by: Han Gao <gaohan at iscas.ac.cn>
---
 arch/riscv/boot/dts/thead/Makefile               |   1 +
 arch/riscv/boot/dts/thead/th1520-milkv-meles.dts | 227 +++++++++++++++++++++++
 2 files changed, 228 insertions(+)

diff --git a/arch/riscv/boot/dts/thead/Makefile b/arch/riscv/boot/dts/thead/Makefile
index b55a17127c2bc06cbfb06d5f7c92dc7296e98437..25f7fe068368c97df2490bedc3eae70276a2e442 100644
--- a/arch/riscv/boot/dts/thead/Makefile
+++ b/arch/riscv/boot/dts/thead/Makefile
@@ -1,2 +1,3 @@
 # SPDX-License-Identifier: GPL-2.0
 dtb-$(CONFIG_ARCH_THEAD) += th1520-lichee-pi-4a.dtb th1520-beaglev-ahead.dtb
+dtb-$(CONFIG_ARCH_THEAD) += th1520-milkv-meles.dtb
diff --git a/arch/riscv/boot/dts/thead/th1520-milkv-meles.dts b/arch/riscv/boot/dts/thead/th1520-milkv-meles.dts
new file mode 100644
index 0000000000000000000000000000000000000000..3714047190789bfccd8ff6810342d7ff865e74e4
--- /dev/null
+++ b/arch/riscv/boot/dts/thead/th1520-milkv-meles.dts
@@ -0,0 +1,227 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (C) 2021-2022 Alibaba Group Holding Limited.
+ * Copyright (C) 2026 Han Gao <gaohan at iscas.ac.cn>
+ */
+
+/dts-v1/;
+
+#include "th1520.dtsi"
+
+/ {
+	model = "Milk-V Meles";
+	compatible = "milkv,meles", "thead,th1520";
+
+	aliases {
+		ethernet0 = &gmac0;
+		gpio0 = &gpio0;
+		gpio1 = &gpio1;
+		gpio2 = &gpio2;
+		gpio3 = &gpio3;
+		gpio4 = &gpio4;
+		gpio5 = &aogpio;
+		mmc0 = &emmc;
+		mmc1 = &sdio0;
+		serial0 = &uart0;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	memory at 0 {
+		device_type = "memory";
+		reg = <0x0 0x0 0x2 0x0>;
+	};
+
+	fan: pwm-fan {
+		compatible = "pwm-fan";
+		pinctrl-names = "default";
+		pinctrl-0 = <&fan_pins>;
+		pwms = <&pwm 2 10000000 0>;
+		cooling-levels = <0 64 192 255>;
+		#cooling-cells = <2>;
+	};
+};
+
+/* Names follow the 40-pin header signal labels. */
+&aogpio {
+	gpio-line-names = "", "", "", "", "", "", "", "AOGPIO_7",
+			  "AOGPIO_8", "", "AOGPIO_10", "AOGPIO_11";
+};
+
+&emmc {
+	bus-width = <8>;
+	max-frequency = <52000000>;
+	cap-mmc-highspeed;
+	mmc-ddr-1_8v;
+	non-removable;
+	no-sdio;
+	no-sd;
+
+	status = "okay";
+};
+
+&gmac0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&gmac0_pins>, <&mdio0_pins>;
+	phy-handle = <&phy0>;
+	phy-mode = "rgmii-id";
+
+	status = "okay";
+};
+
+&gpio0 {
+	gpio-line-names = "", "", "", "", "", "", "", "", "GPIO0_8",
+			  "GPIO0_9", "GPIO0_10", "GPIO0_11", "", "", "",
+			  "", "GPIO0_16", "GPIO0_17";
+};
+
+&gpio2 {
+	gpio-line-names = "GPIO2_0", "GPIO2_1", "", "", "", "", "", "",
+			  "", "", "", "GPIO2_11", "GPIO2_12", "",
+			  "GPIO2_14", "GPIO2_15", "GPIO2_16", "GPIO2_17",
+			  "", "", "", "", "GPIO2_22", "GPIO2_23",
+			  "GPIO2_24", "GPIO2_25", "", "", "", "", "",
+			  "GPIO2_31";
+};
+
+&gpio3 {
+	gpio-line-names = "GPIO3_0", "GPIO3_1", "GPIO3_2", "GPIO3_3";
+};
+
+&mdio0 {
+	phy0: ethernet-phy at 1 {
+		reg = <1>;
+	};
+};
+
+&osc {
+	clock-frequency = <24000000>;
+};
+
+&osc_32k {
+	clock-frequency = <32768>;
+};
+
+&padctrl0_apsys {
+	fan_pins: fan-0 {
+		pwm2-pins {
+			pins = "QSPI0_CSN1";
+			function = "pwm";
+			bias-disable;
+			drive-strength = <25>;
+			input-disable;
+			input-schmitt-disable;
+			slew-rate = <0>;
+		};
+	};
+
+	gmac0_pins: gmac0-0 {
+		tx-pins {
+			pins = "GMAC0_TX_CLK",
+			       "GMAC0_TXEN",
+			       "GMAC0_TXD0",
+			       "GMAC0_TXD1",
+			       "GMAC0_TXD2",
+			       "GMAC0_TXD3";
+			function = "gmac0";
+			bias-disable;
+			drive-strength = <25>;
+			input-disable;
+			input-schmitt-disable;
+			slew-rate = <0>;
+		};
+
+		rx-pins {
+			pins = "GMAC0_RX_CLK",
+			       "GMAC0_RXDV",
+			       "GMAC0_RXD0",
+			       "GMAC0_RXD1",
+			       "GMAC0_RXD2",
+			       "GMAC0_RXD3";
+			function = "gmac0";
+			bias-disable;
+			drive-strength = <1>;
+			input-enable;
+			input-schmitt-disable;
+			slew-rate = <0>;
+		};
+	};
+
+	mdio0_pins: mdio0-0 {
+		mdc-pins {
+			pins = "GMAC0_MDC";
+			function = "gmac0";
+			bias-disable;
+			drive-strength = <13>;
+			input-disable;
+			input-schmitt-disable;
+			slew-rate = <0>;
+		};
+
+		mdio-pins {
+			pins = "GMAC0_MDIO";
+			function = "gmac0";
+			bias-disable;
+			drive-strength = <13>;
+			input-enable;
+			input-schmitt-enable;
+			slew-rate = <0>;
+		};
+	};
+
+	sdio0_pins: sdio0-0 {
+		detn-pins {
+			pins = "SDIO0_DETN";
+			function = "sdio";
+			bias-disable; /* external pull-up */
+			drive-strength = <1>;
+			input-enable;
+			input-schmitt-enable;
+			slew-rate = <0>;
+		};
+	};
+
+	uart0_pins: uart0-0 {
+		tx-pins {
+			pins = "UART0_TXD";
+			function = "uart";
+			bias-disable;
+			drive-strength = <3>;
+			input-disable;
+			input-schmitt-disable;
+			slew-rate = <0>;
+		};
+
+		rx-pins {
+			pins = "UART0_RXD";
+			function = "uart";
+			bias-disable;
+			drive-strength = <1>;
+			input-enable;
+			input-schmitt-enable;
+			slew-rate = <0>;
+		};
+	};
+};
+
+&sdio0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&sdio0_pins>;
+	bus-width = <4>;
+	max-frequency = <50000000>;
+	cap-sd-highspeed;
+	no-1-8-v;
+	disable-wp;
+	no-sdio;
+
+	status = "okay";
+};
+
+&uart0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart0_pins>;
+
+	status = "okay";
+};

-- 
2.47.3