[PATCH v10 5/9] riscv: implement preemptible this_cpu add_return operations

[bot+bpf-ci at kernel.org]

> riscv: implement preemptible this_cpu add_return operations

TL;DR: Nit only: the riscv this_cpu add_return helpers duplicate the 32/64 and
8/16 code and the field mask; could they use the existing macro-generated
pattern like neighbouring ops? Not a bug.

> diff --git a/arch/riscv/include/asm/percpu.h b/arch/riscv/include/asm/percpu.h
> --- a/arch/riscv/include/asm/percpu.h
> +++ b/arch/riscv/include/asm/percpu.h

[ ... ]

> +static __always_inline u32
> +__percpu_add_return_amo_case_32(void __percpu *pcp, unsigned long val)
> +{
[ ... ]
> +	return ret + (u32)val;
> +}
> +
> +#ifdef CONFIG_64BIT
> +static __always_inline u64
> +__percpu_add_return_amo_case_64(void __percpu *pcp, unsigned long val)
> +{
[ ... ]
> +static __always_inline unsigned long
> +__percpu_add_return_8_16(void __percpu *pcp, unsigned long val,
> +			 unsigned int bits)
> +{
> +	__PCPU_OP_CONTEXT();
> +	const u32 field_mask = GENMASK(bits - 1, 0);

This isn't a bug, but the add_return helpers repeat code that the rest of
this header generates with macros.

__percpu_add_return_amo_case_32() and __percpu_add_return_amo_case_64() are
identical apart from the width and the .w/.d suffix.  Inside
__percpu_add_return_8_16(), the amoadd.b and amoadd.h asm blocks are
identical apart from the suffix and the (u8)/(u16) casts.  The field mask is
rebuilt with GENMASK(bits - 1, 0) even though PERCPU_8_16_GET_MASK(sz)
already exists.

The neighbouring __PERCPU_AMO_OP_CASE and __PERCPU_8_16_OP_CASE helpers take
the width and suffix as macro parameters.

Could the add_return variants be generated the same way (taking sz/sfx, and
using PERCPU_8_16_GET_MASK), so the 32/64 and 8/16 copies don't need to be
kept in sync by hand?


---
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CI run summary: https://github.com/kernel-patches/bpf/actions/runs/43205409812