[PATCH] riscv: pci: allow write-combining mmap of PCI BARs

[patchwork-bot+linux-riscv at kernel.org]

Hello:

This patch was applied to riscv/linux.git (fixes)
by Paul Walmsley <pjw at kernel.org>:

On Tue, 10 Nov 2026 15:04:49 +0000 you wrote:
> Define arch_can_pci_mmap_wc() for RISC-V, so that the PCI core can
> create resourceN_wc in sysfs for prefetchable BARs. Without it, the only
> sysfs mapping of such a BAR is resourceN, which uses pgprot_device():
> with Svpbmt or XTheadMae that is the IO memory type, where every access
> is strongly ordered and nothing is merged.
> 
> resourceN_wc is mapped with pgprot_writecombine(), which selects the NC
> memory type when the kernel uses Svpbmt or XTheadMae. Without either,
> _PAGE_NOCACHE is 0 and pgprot_writecombine() changes nothing, so
> resourceN_wc would get the same PMA-defined attributes as resourceN and
> no write-combining at all. Make arch_can_pci_mmap_wc() true only when
> _PAGE_NOCACHE is non-zero. On 64-bit this is a runtime check, as
> _PAGE_NOCACHE is chosen at boot from the CPU extensions; on 32-bit it is
> always 0, so nothing changes there.
> 
> [...]

Here is the summary with links:
  - riscv: pci: allow write-combining mmap of PCI BARs
    https://git.kernel.org/riscv/c/79fc9d9467a1

You are awesome, thank you!
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