[PATCH v1] riscv: irqflags: Conditionally enable interrupts in arch_local_irq_restore()

[Andy Chiu]

From: Anton Blanchard <antonb at tenstorrent.com>

The Tenstorrent Ascalon core has an optimization that reduces pipeline
synchronisation for immediate writes of SIE. This optimization does not
work with register-based CSR writes, which occur when restoring flags in
arch_local_irq_restore().

Refactor arch_local_irq_restore() to conditionally call
arch_local_irq_enable() only when saved flags indicate interrupts were
enabled.

On a simple nginx benchmark serving a small static HTML file this patch
improves performance by 4%.

Signed-off-by: Anton Blanchard <antonb at tenstorrent.com>
Co-developed-by: Nicholas Piggin <npiggin at oss.tenstorrent.com>
Signed-off-by: Nicholas Piggin <npiggin at oss.tenstorrent.com>
Signed-off-by: Andy Chiu <tchiu at tenstorrent.com>
---
 arch/riscv/include/asm/irqflags.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/riscv/include/asm/irqflags.h b/arch/riscv/include/asm/irqflags.h
index 6fd8cbfcfcc7..5b1bca17bdc4 100644
--- a/arch/riscv/include/asm/irqflags.h
+++ b/arch/riscv/include/asm/irqflags.h
@@ -48,7 +48,8 @@ static inline int arch_irqs_disabled(void)
 /* set interrupt enabled status */
 static inline void arch_local_irq_restore(unsigned long flags)
 {
-	csr_set(CSR_STATUS, flags & SR_IE);
+	if (!arch_irqs_disabled_flags(flags))
+		arch_local_irq_enable();
 }
 
 #endif /* _ASM_RISCV_IRQFLAGS_H */

base-commit: 6628e7d4c6b25c8d18f1345e3a20d21829aae7e4
-- 
2.43.0