[PATCH v3 7/7] riscv: dts: tenstorrent: Add Atlantis platform

[Anirudh Srinivasan]

On Sun, Nov 8, 2026 at 11:11 PM Joel Stanley <joel at jms.id.au> wrote:
>
> Add initial support for the Tenstorrent Atlantis platform, based on the
> Atlantis SoC featuring 8x RVA23-compliant Tenstorrent Ascalon-XG cores.
>
> The evb machine represents an internal bringup vehicle with just the
> interrupt controllers and a UART. This will be updated in time with a
> full featured machine once details are available.
>
> The chosen node sets bootargs to earlycon=sbi to aid debugging early
> boot, as the platform may not have a bootloader to fill out the chosen
> node.
>
> The m-mode IMSIC setting riscv,guest-index-bits looks strange, as m-mode
> devices don't have guest interrupt files. The spacing (stride) between
> m-mode files is the same 256KB as s-mode on Atlantis, so we set the
> property so software (eg OpenSBI) can derive the layout.
>
> The SoC has a 8-way 64KB L1I, 4-way 256KB L1D, and a 24-way 12MB last
> level cache shared across all cores.
>
> Co-developed-by: Drew Fustini <fustini at kernel.org>
> Signed-off-by: Drew Fustini <fustini at kernel.org>
> Signed-off-by: Joel Stanley <joel at jms.id.au>
> ---
> v3:
>  - Fix prcm_rcpu parent
>  - Delegate all aplic irqs
>  - Drop uart1 clock override
>  - Use earlycon=sbi, document rationale
>  - Fix mistakes in cache info
>
> v2:
>  - Update mtimer compatible
>  - Add Drew's co-developed-by
>  - Correct aplic num-sources count
> ---
>  arch/riscv/boot/dts/tenstorrent/Makefile      |   1 +
>  .../boot/dts/tenstorrent/atlantis-evb.dts     |  29 ++
>  .../boot/dts/tenstorrent/atlantis-soc.dtsi    | 473 ++++++++++++++++++
>  3 files changed, 503 insertions(+)
>  create mode 100644 arch/riscv/boot/dts/tenstorrent/atlantis-evb.dts
>  create mode 100644 arch/riscv/boot/dts/tenstorrent/atlantis-soc.dtsi
>
> diff --git a/arch/riscv/boot/dts/tenstorrent/Makefile b/arch/riscv/boot/dts/tenstorrent/Makefile
> index 2c81faaba462..92d8bb1a683f 100644
> --- a/arch/riscv/boot/dts/tenstorrent/Makefile
> +++ b/arch/riscv/boot/dts/tenstorrent/Makefile
> @@ -1,2 +1,3 @@
>  # SPDX-License-Identifier: GPL-2.0
>  dtb-$(CONFIG_ARCH_TENSTORRENT) += blackhole-card.dtb
> +dtb-$(CONFIG_ARCH_TENSTORRENT) += atlantis-evb.dtb
> diff --git a/arch/riscv/boot/dts/tenstorrent/atlantis-evb.dts b/arch/riscv/boot/dts/tenstorrent/atlantis-evb.dts
> new file mode 100644
> index 000000000000..839a63dc9507
> --- /dev/null
> +++ b/arch/riscv/boot/dts/tenstorrent/atlantis-evb.dts
> @@ -0,0 +1,29 @@
> +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> +// Copyright 2026 Tenstorrent
> +/dts-v1/;
> +
> +#include "atlantis-soc.dtsi"
> +
> +/ {
> +       model = "Tenstorrent Atlantis development platform";
> +       compatible = "tenstorrent,atlantis-evb", "tenstorrent,atlantis";
> +
> +       memory at 0 {
> +               device_type = "memory";
> +               reg = <0x0 0x00000000 0x0 0x80000000>,
> +                     <0x1 0x80000000 0x0 0x80000000>;
> +       };
> +
> +       aliases {
> +               serial0 = &uart1;
> +       };
> +
> +       chosen {
> +               bootargs = "earlycon=sbi";
> +               stdout-path = "serial0:115200";
> +       };
> +};
> +
> +&uart1 {
> +       status = "okay";
> +};
> diff --git a/arch/riscv/boot/dts/tenstorrent/atlantis-soc.dtsi b/arch/riscv/boot/dts/tenstorrent/atlantis-soc.dtsi
> new file mode 100644
> index 000000000000..085b0ab90bbe
> --- /dev/null
> +++ b/arch/riscv/boot/dts/tenstorrent/atlantis-soc.dtsi
> @@ -0,0 +1,473 @@
> +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> +// Copyright 2026 Tenstorrent
> +/dts-v1/;
> +
> +#include <dt-bindings/interrupt-controller/irq.h>
> +#include <dt-bindings/clock/tenstorrent,atlantis-prcm-rcpu.h>
> +
> +/ {
> +       model = "Tenstorrent Atlantis";
> +       compatible = "tenstorrent,atlantis";
> +
> +       #address-cells = <2>;
> +       #size-cells = <2>;
> +
> +       cpus {

Please add a cpus: label here (like below). It'll be useful if we need
to refer to this node in the u-boot DT.

            cpus: cpus {

            };

> +               #address-cells = <1>;
> +               #size-cells = <0>;
> +               timebase-frequency = <1000000000>;
> +
> +               cpu0: cpu at 0 {
> +                       compatible = "tenstorrent,ascalon-xg", "tenstorrent,ascalon", "riscv";
> +                       reg = <0>;