(subset) [PATCH v5 0/6] clk/reset: anlogic: add support for DR1V90 SoC

[Conor Dooley]

From: Conor Dooley <conor.dooley at microchip.com>

On Thu, 14 May 2026 17:27:16 +0800, Junhui Liu wrote:
> Add Clock and Reset Unit (CRU) support for the Anlogic DR1V90 SoC, as
> well as corresponding dts bindings and dts integration.
> 
> The CRU driver framework is built around the clock controller as the
> primary device, with the reset controller implemented as an auxiliary
> device. The clock part refers to the vendor's code [1] to determine the
> structure of the clock tree.
> 
> [...]

Applied to riscv-soc-fixes, thanks!

[5/6] riscv: dts: anlogic: add clocks and CRU for DR1V90
      (no commit info)

Thanks,
Conor.