[PATCH] irqchip/riscv-imsic: Synchronize remote state with IRQ work

Sebastian Andrzej Siewior bigeasy at linutronix.de
Tue Nov 3 00:59:49 PST 2026


On 2026-11-03 08:04:33 [+0000], Troy Mitchell wrote:
> Without a real broadcast device, the tick code falls back to the hrtimer
> based broadcast, which keeps one CPU's local timer running. Once the SoC
> timer is registered it replaces the hrtimer broadcast, and every CPU may
> stop its local timer in idle.
> 
> On K3 the SoC timer interrupt goes through APLIC in MSI mode to IMSIC.
> When the CPU owning it goes offline, the interrupt is moved to a CPU
> that may already be idle with its local timer stopped. IMSIC leaves the
> enable on the new target to a timer on that CPU, and that timer can only
> fire through the broadcast interrupt, which is not enabled yet. The
> system stalls.

So the broadcast timer is moved on CPU which is idle and waking the CPU
is done by a timer, which does not work if the CPU is idle.
This makes sense.

Sebastian



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