[PATCH v2] irqchip/sifive-plic: Avoid signed shift in interrupt enable mask

[patchwork-bot+linux-riscv at kernel.org]

Hello:

This patch was applied to riscv/linux.git (fixes)
by Thomas Gleixner <tglx at kernel.org>:

On Sun, 20 Sep 2026 21:06:53 +0800 you wrote:
> __plic_toggle() builds a 32-bit interrupt enable mask using a signed
> integer literal. A valid interrupt selecting bit 31 evaluates 1 << 31,
> which shifts a signed int into its sign bit.
> 
> Use BIT(), matching the equivalent mask construction in plic_irq_eoi().
> The resulting mask remains representable in u32 on both RV32 and RV64.
> 
> [...]

Here is the summary with links:
  - [v2] irqchip/sifive-plic: Avoid signed shift in interrupt enable mask
    https://git.kernel.org/riscv/c/0f214e5bbee5

You are awesome, thank you!
-- 
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/patchwork/pwbot.html