[PATCH 2/2] riscv: dts: sifive: describe the FU740 CLINT

Han Gao via B4 Relay devnull+gaohan.iscas.ac.cn at kernel.org
Sun Nov 1 05:35:32 PST 2026


From: Han Gao <gaohan at iscas.ac.cn>

coreboot and U-Boot already describe the FU740 CLINT for OpenSBI,
but Linux's device tree is missing it. Add the node for all five harts.

Signed-off-by: Han Gao <gaohan at iscas.ac.cn>
---
 arch/riscv/boot/dts/sifive/fu740-c000.dtsi | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/riscv/boot/dts/sifive/fu740-c000.dtsi b/arch/riscv/boot/dts/sifive/fu740-c000.dtsi
index 6150f3397bff9269767b190d961024a98b367ddc..4dd74c9a033e3ec6b1ff2706a9c0c11824ea4a07 100644
--- a/arch/riscv/boot/dts/sifive/fu740-c000.dtsi
+++ b/arch/riscv/boot/dts/sifive/fu740-c000.dtsi
@@ -179,6 +179,17 @@ soc {
 		#size-cells = <2>;
 		compatible = "simple-bus";
 		ranges;
+
+		clint: timer at 2000000 {
+			compatible = "sifive,fu740-c000-clint", "sifive,clint0";
+			reg = <0x0 0x2000000 0x0 0x10000>;
+			interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>,
+					      <&cpu1_intc 3>, <&cpu1_intc 7>,
+					      <&cpu2_intc 3>, <&cpu2_intc 7>,
+					      <&cpu3_intc 3>, <&cpu3_intc 7>,
+					      <&cpu4_intc 3>, <&cpu4_intc 7>;
+		};
+
 		plic0: interrupt-controller at c000000 {
 			#interrupt-cells = <1>;
 			#address-cells = <0>;

-- 
2.47.3





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