[PATCH v2] perf regs: Refactor use of arch__sample_reg_masks to perf_reg_name

[patchwork-bot+linux-riscv at kernel.org]

Hello:

This patch was applied to riscv/linux.git (for-next)
by Arnaldo Carvalho de Melo <acme at redhat.com>:

On Tue, 20 Jan 2026 18:17:35 -0800 you wrote:
> arch__sample_reg_masks isn't supported on ARM(32), csky, loongarch,
> MIPS, RISC-V and s390. The table returned by the function just has the
> name of a register paired with the corresponding sample_regs_user mask
> value. For a given perf register we can compute the name with
> perf_reg_name and the mask is just 1 left-shifted by the perf register
> number. Change __parse_regs to use this method for finding registers
> rather than arch__sample_reg_masks, thereby adding __parse_regs
> support for ARM(32), csky, loongarch, MIPS, RISC-V and s390. As
> arch__sample_reg_masks is then unused, remove the now unneeded
> declarations.
> 
> [...]

Here is the summary with links:
  - [v2] perf regs: Refactor use of arch__sample_reg_masks to perf_reg_name
    https://git.kernel.org/riscv/c/3d06db9bad1a

You are awesome, thank you!
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