[PATCH 1/1] riscv: dts: spacemit: reorder phy nodes for K1

[Yixun Lan]

Hi Chukun, 

On 18:00 Wed 18 Mar     , Chukun Pan wrote:
> Reorder the PHY nodes of USB and PCIe to the correct positions based on
> the register address. This improves the readability and maintainability
> of the DT. No functional change is introduced by this reordering.
> 
> Signed-off-by: Chukun Pan <amadeus at jmu.edu.cn>

Reviewed-by: Yixun Lan <dlan at kernel.org>

> ---
>  arch/riscv/boot/dts/spacemit/k1.dtsi | 108 +++++++++++++--------------
>  1 file changed, 54 insertions(+), 54 deletions(-)
> 
> diff --git a/arch/riscv/boot/dts/spacemit/k1.dtsi b/arch/riscv/boot/dts/spacemit/k1.dtsi
> index d2015201f8e5..f0bad6855c97 100644
> --- a/arch/riscv/boot/dts/spacemit/k1.dtsi
> +++ b/arch/riscv/boot/dts/spacemit/k1.dtsi
> @@ -359,6 +359,60 @@ syscon_rcpu2: system-controller at c0888000 {
>  			#reset-cells = <1>;
>  		};
>  
> +		usbphy2: phy at c0a30000 {
> +			compatible = "spacemit,k1-usb2-phy";
> +			reg = <0x0 0xc0a30000 0x0 0x200>;
> +			clocks = <&syscon_apmu CLK_USB30>;
> +			#phy-cells = <0>;
> +			status = "disabled";
> +		};
> +
> +		combo_phy: phy at c0b10000 {
> +			compatible = "spacemit,k1-combo-phy";
> +			reg = <0x0 0xc0b10000 0x0 0x1000>;
> +			clocks = <&vctcxo_24m>,
> +				 <&syscon_apmu CLK_PCIE0_DBI>,
> +				 <&syscon_apmu CLK_PCIE0_MASTER>,
> +				 <&syscon_apmu CLK_PCIE0_SLAVE>;
> +			clock-names = "refclk",
> +				      "dbi",
> +				      "mstr",
> +				      "slv";
> +			resets = <&syscon_apmu RESET_PCIE0_GLOBAL>,
> +				 <&syscon_apmu RESET_PCIE0_DBI>,
> +				 <&syscon_apmu RESET_PCIE0_MASTER>,
> +				 <&syscon_apmu RESET_PCIE0_SLAVE>;
> +			reset-names = "phy",
> +				      "dbi",
> +				      "mstr",
> +				      "slv";
> +			#phy-cells = <1>;
> +			spacemit,apmu = <&syscon_apmu>;
> +			status = "disabled";
> +		};
> +
> +		pcie1_phy: phy at c0c10000 {
> +			compatible = "spacemit,k1-pcie-phy";
> +			reg = <0x0 0xc0c10000 0x0 0x1000>;
> +			clocks = <&vctcxo_24m>;
> +			clock-names = "refclk";
> +			resets = <&syscon_apmu RESET_PCIE1_GLOBAL>;
> +			reset-names = "phy";
> +			#phy-cells = <0>;
> +			status = "disabled";
> +		};
> +
> +		pcie2_phy: phy at c0d10000 {
> +			compatible = "spacemit,k1-pcie-phy";
> +			reg = <0x0 0xc0d10000 0x0 0x1000>;
> +			clocks = <&vctcxo_24m>;
> +			clock-names = "refclk";
> +			resets = <&syscon_apmu RESET_PCIE2_GLOBAL>;
> +			reset-names = "phy";
> +			#phy-cells = <0>;
> +			status = "disabled";
> +		};
> +
>  		i2c0: i2c at d4010800 {
>  			compatible = "spacemit,k1-i2c";
>  			reg = <0x0 0xd4010800 0x0 0x38>;
> @@ -429,60 +483,6 @@ i2c5: i2c at d4013800 {
>  			status = "disabled";
>  		};
>  
> -		usbphy2: phy at c0a30000 {
> -			compatible = "spacemit,k1-usb2-phy";
> -			reg = <0x0 0xc0a30000 0x0 0x200>;
> -			clocks = <&syscon_apmu CLK_USB30>;
> -			#phy-cells = <0>;
> -			status = "disabled";
> -		};
> -
> -		combo_phy: phy at c0b10000 {
> -			compatible = "spacemit,k1-combo-phy";
> -			reg = <0x0 0xc0b10000 0x0 0x1000>;
> -			clocks = <&vctcxo_24m>,
> -				 <&syscon_apmu CLK_PCIE0_DBI>,
> -				 <&syscon_apmu CLK_PCIE0_MASTER>,
> -				 <&syscon_apmu CLK_PCIE0_SLAVE>;
> -			clock-names = "refclk",
> -				      "dbi",
> -				      "mstr",
> -				      "slv";
> -			resets = <&syscon_apmu RESET_PCIE0_GLOBAL>,
> -				 <&syscon_apmu RESET_PCIE0_DBI>,
> -				 <&syscon_apmu RESET_PCIE0_MASTER>,
> -				 <&syscon_apmu RESET_PCIE0_SLAVE>;
> -			reset-names = "phy",
> -				      "dbi",
> -				      "mstr",
> -				      "slv";
> -			#phy-cells = <1>;
> -			spacemit,apmu = <&syscon_apmu>;
> -			status = "disabled";
> -		};
> -
> -		pcie1_phy: phy at c0c10000 {
> -			compatible = "spacemit,k1-pcie-phy";
> -			reg = <0x0 0xc0c10000 0x0 0x1000>;
> -			clocks = <&vctcxo_24m>;
> -			clock-names = "refclk";
> -			resets = <&syscon_apmu RESET_PCIE1_GLOBAL>;
> -			reset-names = "phy";
> -			#phy-cells = <0>;
> -			status = "disabled";
> -		};
> -
> -		pcie2_phy: phy at c0d10000 {
> -			compatible = "spacemit,k1-pcie-phy";
> -			reg = <0x0 0xc0d10000 0x0 0x1000>;
> -			clocks = <&vctcxo_24m>;
> -			clock-names = "refclk";
> -			resets = <&syscon_apmu RESET_PCIE2_GLOBAL>;
> -			reset-names = "phy";
> -			#phy-cells = <0>;
> -			status = "disabled";
> -		};
> -
>  		syscon_apbc: system-controller at d4015000 {
>  			compatible = "spacemit,k1-syscon-apbc";
>  			reg = <0x0 0xd4015000 0x0 0x1000>;
> -- 
> 2.34.1
> 
> 

-- 
Yixun Lan (dlan)