[RFC PATCH 1/6] riscv: Add a custom, simplified version of Svpbmt "XPbmtUC"

[Conor Dooley]

On Fri, Mar 13, 2026 at 02:33:16PM -0700, Bo Gan wrote:
> > > diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
> > > index fa591aff9d335..faec169004b4a 100644
> > > --- a/arch/riscv/kernel/cpufeature.c
> > > +++ b/arch/riscv/kernel/cpufeature.c
> > > @@ -1118,6 +1118,14 @@ void __init riscv_fill_hwcap(void)
> > >   		riscv_v_setup_vsize();
> > >   	}
> > > +#ifdef CONFIG_RISCV_ISA_XPBMTUC
> > 
> > Code like this needs to be unconditionally compiled.
> > 
> > > +	if (!of_property_read_u32(of_root, "riscv,xpbmt-uncache-bit",
> > > +				  &riscv_xpbmtuc_bit)) {
> > > +		riscv_xpbmtuc_mask = 1UL << riscv_xpbmtuc_bit;
> > > +		set_bit(RISCV_ISA_EXT_XPBMTUC, riscv_isa);
> > > +		pr_info("Using XPbmtUC bit=%d\n", riscv_xpbmtuc_bit);
> > > +	}
> > > +#endif
> > >   	memset(print_str, 0, sizeof(print_str));
> > >   	for (i = 0, j = 0; i < NUM_ALPHA_EXTS; i++)
> > >   		if (riscv_isa[0] & BIT_MASK(i))


btw, not sure if you saw this comment, about using IS_ENABLED() rather
than ifdeffery.
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