[PATCH 2/2] reset: spacemit: k3: Add individual reset lines for USB, PCIe

[Philipp Zabel]

On Do, 2026-03-12 at 10:34 +0000, Yixun Lan wrote:
> The DWC3 USB host controller in K3 SoC has three reset lines - AHB,
> VCC, PHY. The PCIe controller also has three reset lines - DBI, Slave,
> Master. So, decouple USB and PCIe reset line to individual ones.
> 
> Signed-off-by: Yixun Lan <dlan at kernel.org>
> ---
>  drivers/reset/spacemit/reset-spacemit-k3.c | 50 ++++++++++++++++++------------
>  1 file changed, 30 insertions(+), 20 deletions(-)
> 
> diff --git a/drivers/reset/spacemit/reset-spacemit-k3.c b/drivers/reset/spacemit/reset-spacemit-k3.c
> index e9e32e4c1ba5..9f58526b0119 100644
> --- a/drivers/reset/spacemit/reset-spacemit-k3.c
> +++ b/drivers/reset/spacemit/reset-spacemit-k3.c
> @@ -112,16 +112,21 @@ static const struct ccu_reset_data k3_apmu_resets[] = {
>  	[RESET_APMU_SDH0]	= RESET_DATA(APMU_SDH0_CLK_RES_CTRL,	0, BIT(1)),
>  	[RESET_APMU_SDH1]	= RESET_DATA(APMU_SDH1_CLK_RES_CTRL,	0, BIT(1)),
>  	[RESET_APMU_SDH2]	= RESET_DATA(APMU_SDH2_CLK_RES_CTRL,	0, BIT(1)),
> -	[RESET_APMU_USB2]	= RESET_DATA(APMU_USB_CLK_RES_CTRL,	0,
> -				BIT(1)|BIT(2)|BIT(3)),
> -	[RESET_APMU_USB3_PORTA]	= RESET_DATA(APMU_USB_CLK_RES_CTRL,	0,
> -				BIT(5)|BIT(6)|BIT(7)),
> -	[RESET_APMU_USB3_PORTB]	= RESET_DATA(APMU_USB_CLK_RES_CTRL,	0,
> -				BIT(9)|BIT(10)|BIT(11)),
> -	[RESET_APMU_USB3_PORTC]	= RESET_DATA(APMU_USB_CLK_RES_CTRL,	0,
> -				BIT(13)|BIT(14)|BIT(15)),
> -	[RESET_APMU_USB3_PORTD]	= RESET_DATA(APMU_USB_CLK_RES_CTRL,	0,
> -				BIT(17)|BIT(18)|BIT(19)),

If there are already APMU reset users around, these either need to stay
or the driver needs an of_xlate that makes sure the deprecated ranges
are never given out to consumers.

Or, if there are no RESET_APMU users whatsoever yet, we might be
allowed to renumber RESET_APMU_* into a contiguous range.


regards
Philipp