[RFC v11 2/4] dt-bindings: soc: microchip: document PolarFire SoC's gpio interrupt mux

[Herve Codina]

Hi Conor,

On Fri, 27 Feb 2026 14:52:28 +0000
Conor Dooley <conor at kernel.org> wrote:

> From: Conor Dooley <conor.dooley at microchip.com>
> 
> On PolarFire SoC there are more GPIO interrupts than there are interrupt
> lines available on the PLIC, and a runtime configurable mux is used to
> decide which interrupts are assigned direct connections to the PLIC &
> which are relegated to sharing a line.
> 
> Signed-off-by: Conor Dooley <conor.dooley at microchip.com>

Reviewed-by: Herve Codina <herve.codina at bootlin.com>

Best regards,
Hervé