[PATCH v2 0/5] Convert riscv to use the generic iommu page table

[Tomasz Jeznach]

Hello everyone,

Sorry for the very long radio silence. I'm back online. I'll update my
email in the MAINTAINERS file soon, for now adding my new address to
the recipients.

Thanks Jason for this change, I've looked at the v1, looks good. It
passed my initial testing at the time. Unfortunately I had to hold off
on testing for a while...

I've revived RISC-V test flows based on v6.19-rc7 + this patchset and
hit translation failures on DMAs from/to NVMe SSD. Hopefully
unrelated, still investigating.

Best,
- Tomasz


On Fri, Jan 30, 2026 at 3:14 PM Paul Walmsley <pjw at kernel.org> wrote:
>
> On Wed, 28 Jan 2026, Jason Gunthorpe wrote:
>
> > On Thu, Jan 22, 2026 at 08:56:12AM +0100, Joerg Roedel wrote:
> > > Tomasz,
> > >
> > > On Tue, Jan 06, 2026 at 11:06:44AM -0400, Jason Gunthorpe wrote:
> > > > Jason Gunthorpe (5):
> > > >   iommupt: Add the RISC-V page table format
> > > >   iommu/riscv: Disable SADE
> > > >   iommu/riscv: Use the generic iommu page table
> > > >   iommu/riscv: Enable SVNAPOT support for contiguous ptes
> > > >   iommu/riscv: Allow RISC_VIOMMU to COMPILE_TEST
> > >
> > > Any opinion on that series?
> >
> > Let's take it if we don't hear from Tomasz this week? It brings
> > the contiguous page feature people wanted and now that it is tested
> > I'm not especially worried about it.
>
> In the event that you don't hear from Tomasz:
>
> Acked-by: Paul Walmsley <pjw at kernel.org> # arch/riscv
>
>
> - Paul