[PATCH v2 1/5] iommupt: Add the RISC-V page table format
Andrew Jones
andrew.jones at oss.qualcomm.com
Fri Jan 30 11:21:27 PST 2026
On Tue, Jan 06, 2026 at 11:06:45AM -0400, Jason Gunthorpe wrote:
> The RISC-V format is a fairly simple 5 level page table not unlike the x86
> one. It has optional support for a single contiguous page size of 64k (16
> x 4k).
>
> The specification describes a 32-bit format, the general code can support
> it via a #define but the iommu side implementation has been left off until
> a user comes.
>
> Signed-off-by: Jason Gunthorpe <jgg at nvidia.com>
> ---
> drivers/iommu/generic_pt/.kunitconfig | 1 +
> drivers/iommu/generic_pt/Kconfig | 9 +
> drivers/iommu/generic_pt/fmt/Makefile | 2 +
> drivers/iommu/generic_pt/fmt/defs_riscv.h | 29 ++
> drivers/iommu/generic_pt/fmt/iommu_riscv64.c | 11 +
> drivers/iommu/generic_pt/fmt/riscv.h | 313 +++++++++++++++++++
> include/linux/generic_pt/common.h | 16 +
> include/linux/generic_pt/iommu.h | 11 +
> 8 files changed, 392 insertions(+)
> create mode 100644 drivers/iommu/generic_pt/fmt/defs_riscv.h
> create mode 100644 drivers/iommu/generic_pt/fmt/iommu_riscv64.c
> create mode 100644 drivers/iommu/generic_pt/fmt/riscv.h
>
> diff --git a/drivers/iommu/generic_pt/.kunitconfig b/drivers/iommu/generic_pt/.kunitconfig
> index 52ac9e661ffd2b..db0a5b2b3c7867 100644
> --- a/drivers/iommu/generic_pt/.kunitconfig
> +++ b/drivers/iommu/generic_pt/.kunitconfig
> @@ -4,6 +4,7 @@ CONFIG_DEBUG_GENERIC_PT=y
> CONFIG_IOMMU_PT=y
> CONFIG_IOMMU_PT_AMDV1=y
> CONFIG_IOMMU_PT_VTDSS=y
> +CONFIG_IOMMU_PT_RISCV64=y
> CONFIG_IOMMU_PT_X86_64=y
> CONFIG_IOMMU_PT_KUNIT_TEST=y
>
> diff --git a/drivers/iommu/generic_pt/Kconfig b/drivers/iommu/generic_pt/Kconfig
> index ce4fb478691457..df0fef423584d5 100644
> --- a/drivers/iommu/generic_pt/Kconfig
> +++ b/drivers/iommu/generic_pt/Kconfig
> @@ -50,6 +50,14 @@ config IOMMU_PT_VTDSS
> level Second Stage page table. It is similar to the X86_64 format with
> 4K/2M/1G page sizes.
>
> +config IOMMU_PT_RISCV64
> + tristate "IOMMU page table for RISC-V 64 bit Sv57/Sv48/Sv39"
> + depends on !GENERIC_ATOMIC64 # for cmpxchg64
> + help
> + iommu_domain implementation for RISC-V 64 bit 3/4/5 level page table.
> + It supports 4K/2M/1G/512G/256T page sizes and can decode a sign
> + extended portion of the 64 bit IOVA space.
> +
> Selected automatically by an IOMMU driver that uses this format.
I assume we want to keep this 'Selected automatically...' line in the help
text of IOMMU_PT_VTDSS too, so it should be duplicated here.
>
> config IOMMU_PT_X86_64
> @@ -66,6 +74,7 @@ config IOMMU_PT_KUNIT_TEST
> tristate "IOMMU Page Table KUnit Test" if !KUNIT_ALL_TESTS
> depends on KUNIT
> depends on IOMMU_PT_AMDV1 || !IOMMU_PT_AMDV1
> + depends on IOMMU_PT_RISCV64 || !IOMMU_PT_RISCV64
> depends on IOMMU_PT_X86_64 || !IOMMU_PT_X86_64
> depends on IOMMU_PT_VTDSS || !IOMMU_PT_VTDSS
> default KUNIT_ALL_TESTS
Thanks,
drew
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