[PATCH v3 0/8] iommu/riscv: Add HPM support for RISC-V IOMMU

[Lv Zheng]

On 2/14/2026 6:21 AM, Yixun Lan wrote:
> Hi Lv,
> 
> On 11:41 Sat 07 Feb     , Lv Zheng wrote:
>> On 2/6/2026 6:44 PM, Krzysztof Kozlowski wrote:
>>> On 04/02/2026 10:08, Lv Zheng wrote:
>>>> Includes HPM support for RISC-V IOMMU. The HPM hardware mechanism can be
>>>> found in the recent announced SpacemiT SoCs (K3, V100), where T100
>>>> (SpacemiT distributed IOMMU) is shipped.
>>>>
>>>> Revisions:
>>>> v1
>>>>    Initial release.
>>>> v2 (sent as v1.1)
>>>>    Split and cleanup DT-bindings.
>>>> v3
>>>>    Refactor using vendor specific compatible.
>>>>
>>>
>>>
>>> Do not attach (thread) your patchsets to some other threads (unrelated
>>> or older versions). This buries them deep in the mailbox and might
>>> interfere with applying entire sets. See also:
>>> https://elixir.bootlin.com/linux/v6.16-rc2/source/Documentation/process/submitting-patches.rst#L830
>>
>> Got it.
>> I'm still using an old fashioned upstream way to collect all revisions
>> into one thread. Will align to the preferred style.
>>
> Using b4 will automate this procedure, you can also take a look at
> Konstantin's articles, and the b4 doc
> https://people.kernel.org/monsieuricon/sending-a-kernel-patch-with-b4-part-1
> https://b4.docs.kernel.org/en/latest/

Yes, we've tried b4, it really can automate this process a lot.

Thanks,
Lv

> 
>> Thanks,
>> Lv
>>
>>>
>>> Best regards,
>>> Krzysztof
>>>
>>
>>
>>
>