[PATCH v3 1/2] riscv: Introduce support for hardware break/watchpoints

Anup Patel anup at brainfault.org
Wed Feb 25 21:35:14 PST 2026


On Wed, Feb 25, 2026 at 2:31 PM Conor Dooley <conor at kernel.org> wrote:
>
> On Wed, Feb 25, 2026 at 10:33:27AM +0530, Himanshu Chauhan wrote:
> > On Tue, Feb 24, 2026 at 1:33 PM Conor Dooley <conor.dooley at microchip.com> wrote:
> > >
> > > On Tue, Feb 24, 2026 at 09:30:24AM +0530, Himanshu Chauhan wrote:
> > > > Hi,
> > > >
> > > > On Mon, Feb 23, 2026 at 3:55 PM Conor Dooley <conor.dooley at microchip.com> wrote:
> > > > >
> > > > > On Mon, Feb 23, 2026 at 10:19:17AM +0530, Himanshu Chauhan wrote:
>
> > >
> > > Did you miss the comment at the end about the remaining TODOs?
> >
> > No. As I mentioned in the cover letter, the ptrace support is not
> > implemented here. I am actively working on it and these are
> > implemented in ptrace work.
> > The test is done using the perf events directly. The second patch in
> > this patch set has the test application.
>
> Then the patchset should still be marked RFC, since it is not finished.

Wow! let's all of us post only large series (covering multiple features)
which are difficult to review instead of making life easier for reviewers
through incremental series which make gradual progress over-time.

FYI, the v1 of this series was posted as RFC almost 2 years back.
(Refer, https://lwn.net/Articles/963234/)

Regards,
Anup



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