[PATCH v11 0/5] riscv: mm: Add soft-dirty and uffd-wp support
Chunyan Zhang
zhangchunyan at iscas.ac.cn
Thu Sep 11 02:55:57 PDT 2025
This patchset adds support for Svrsw60t59b [1] extension which is ratified now,
also add soft dirty and userfaultfd write protect tracking for RISC-V.
The patches 1 and 2 add macros to allow architectures to define their own checks
if the soft-dirty / uffd_wp PTE bits are available, in other words for RISC-V,
the Svrsw60t59b extension is supported on which device the kernel is running.
This patchset has been tested with kselftest mm suite in which soft-dirty,
madv_populate, test_unmerge_uffd_wp, and uffd-unit-tests run and pass,
and no regressions are observed in any of the other tests.
This patchset applies on top of v6.17-rc4.
[1] https://github.com/riscv-non-isa/riscv-iommu/pull/543
V11:
- Rename the macro API to pgtable_*_supported() since we also have PMD support;
- Change the default implementations of two macros, make CONFIG_MEM_SOFT_DIRTY or
CONFIG_HAVE_ARCH_USERFAULTFD_WP part of the macros;
- Correct the order of insertion of RISCV_ISA_EXT_SVRSW60T59B;
- Rephrase some comments.
V10: https://lore.kernel.org/all/20250909095611.803898-1-zhangchunyan@iscas.ac.cn/
- Fixed the issue reported by kernel test irobot <lkp at intel.com>.
V9: https://lore.kernel.org/all/20250905103651.489197-1-zhangchunyan@iscas.ac.cn/
- Add pte_soft_dirty/uffd_wp_available() API to allow dynamically checking
if the PTE bit is available for the platform on which the kernel is running.
V8: https://lore.kernel.org/all/20250619065232.1786470-1-zhangchunyan@iscas.ac.cn/)
- Rebase on v6.16-rc1;
- Add dependencies to MMU && 64BIT for RISCV_ISA_SVRSW60T59B;
- Use 'Svrsw60t59b' instead of 'SVRSW60T59B' in Kconfig help paragraph;
- Add Alex's Reviewed-by tag in patch 1.
V7: https://lore.kernel.org/all/20250409095320.224100-1-zhangchunyan@iscas.ac.cn/
- Add Svrsw60t59b [1] extension support;
- Have soft-dirty and uffd-wp depending on the Svrsw60t59b extension to
avoid crashes for the hardware which don't have this extension.
V6: https://lore.kernel.org/all/20250408084301.68186-1-zhangchunyan@iscas.ac.cn/
- Changes to use bits 59-60 which are supported by extension Svrsw60t59b
for soft dirty and userfaultfd write protect tracking.
V5: https://lore.kernel.org/all/20241113095833.1805746-1-zhangchunyan@iscas.ac.cn/
- Fixed typos and corrected some words in Kconfig and commit message;
- Removed pte_wrprotect() from pte_swp_mkuffd_wp(), this is a copy-paste
error;
- Added Alex's Reviewed-by tag in patch 2.
V4: https://lore.kernel.org/all/20240830011101.3189522-1-zhangchunyan@iscas.ac.cn/
- Added bit(4) descriptions into "Format of swap PTE".
V3: https://lore.kernel.org/all/20240805095243.44809-1-zhangchunyan@iscas.ac.cn/
- Fixed the issue reported by kernel test irobot <lkp at intel.com>.
V2: https://lore.kernel.org/all/20240731040444.3384790-1-zhangchunyan@iscas.ac.cn/
- Add uffd-wp supported;
- Make soft-dirty uffd-wp and devmap mutually exclusive which all use
the same PTE bit;
- Add test results of CRIU in the cover-letter.
Chunyan Zhang (5):
mm: softdirty: Add pgtable_soft_dirty_supported()
mm: userfaultfd: Add pgtable_uffd_wp_supported()
riscv: Add RISC-V Svrsw60t59b extension support
riscv: mm: Add soft-dirty page tracking support
riscv: mm: Add userfaultfd write-protect support
arch/riscv/Kconfig | 16 +++
arch/riscv/include/asm/hwcap.h | 1 +
arch/riscv/include/asm/pgtable-bits.h | 37 +++++++
arch/riscv/include/asm/pgtable.h | 143 +++++++++++++++++++++++++-
arch/riscv/kernel/cpufeature.c | 1 +
fs/proc/task_mmu.c | 17 ++-
fs/userfaultfd.c | 23 +++--
include/asm-generic/pgtable_uffd.h | 11 ++
include/linux/mm_inline.h | 7 ++
include/linux/pgtable.h | 12 +++
include/linux/userfaultfd_k.h | 44 +++++---
mm/debug_vm_pgtable.c | 10 +-
mm/huge_memory.c | 13 +--
mm/internal.h | 2 +-
mm/memory.c | 6 +-
mm/mremap.c | 13 +--
mm/userfaultfd.c | 10 +-
17 files changed, 310 insertions(+), 56 deletions(-)
--
2.34.1
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