[PATCH v2 5/9] spi: fsl-qspi: add a clock disable quirk

[Frank Li]

On Thu, Oct 23, 2025 at 07:04:10PM -0500, Alex Elder wrote:
> On 10/23/25 6:36 PM, Frank Li wrote:
> > On Thu, Oct 23, 2025 at 12:59:17PM -0500, Alex Elder wrote:
> > > The SpacemiT K1 SoC QSPI implementation needs to avoid shutting off the
> > > clock when changing its rate.  Add a new quirk to indicate that disabling
> > > and enabling the clock should be skipped when changing its rate for
> > > operations.
> >
> > remove "for operations."
>
> OK.
>
> > >
> > > Signed-off-by: Alex Elder <elder at riscstar.com>
> > > ---
> > > v2: - The quirk flag is now named QUADSPI_QUIRK_SKIP_CLK_DISABLE
> > >      - The predicate now returns bool and is not inline
> > >
> > >   drivers/spi/spi-fsl-qspi.c | 21 +++++++++++++++++----
> > >   1 file changed, 17 insertions(+), 4 deletions(-)
> > >
> > > diff --git a/drivers/spi/spi-fsl-qspi.c b/drivers/spi/spi-fsl-qspi.c
> > > index 1944e63169d36..c21e3804cb032 100644
> > > --- a/drivers/spi/spi-fsl-qspi.c
> > > +++ b/drivers/spi/spi-fsl-qspi.c
> > > @@ -197,6 +197,11 @@
> > >    */
> > >   #define QUADSPI_QUIRK_USE_TDH_SETTING	BIT(5)
> > >
> > > +/*
> > > + * Do not disable the "qspi" clock when changing its rate.
> > > + */
> > > +#define QUADSPI_QUIRK_SKIP_CLK_DISABLE	BIT(6)
> > > +
> > >   struct fsl_qspi_devtype_data {
> > >   	unsigned int rxfifo;
> > >   	unsigned int txfifo;
> > > @@ -306,6 +311,11 @@ static bool needs_tdh_setting(struct fsl_qspi *q)
> > >   	return !!(q->devtype_data->quirks & QUADSPI_QUIRK_USE_TDH_SETTING);
> > >   }
> > >
> > > +static inline bool needs_clk_disable(struct fsl_qspi *q)
> >
> > needs_skip_clk_disable()
>
> OK.  I was trying to avoid the double-negative:
>
>     if (!needs_skip_clk_disasble())
> 	clk_disable...()

Oh, Make senso, needs_clk_disable() is fine

Frank

>
> But I'll do as you suggest.
>
> Thanks.
>
> 					-Alex
> >
> > Frank
> > > +{
> > > +	return !(q->devtype_data->quirks & QUADSPI_QUIRK_SKIP_CLK_DISABLE);
> > > +}
> > > +
> > >   /*
> > >    * An IC bug makes it necessary to rearrange the 32-bit data.
> > >    * Later chips, such as IMX6SLX, have fixed this bug.
> > > @@ -536,15 +546,18 @@ static void fsl_qspi_select_mem(struct fsl_qspi *q, struct spi_device *spi,
> > >   	if (needs_4x_clock(q))
> > >   		rate *= 4;
> > >
> > > -	fsl_qspi_clk_disable_unprep(q);
> > > +	if (needs_clk_disable(q))
> > > +		fsl_qspi_clk_disable_unprep(q);
> > >
> > >   	ret = clk_set_rate(q->clk, rate);
> > >   	if (ret)
> > >   		return;
> > >
> > > -	ret = fsl_qspi_clk_prep_enable(q);
> > > -	if (ret)
> > > -		return;
> > > +	if (needs_clk_disable(q)) {
> > > +		ret = fsl_qspi_clk_prep_enable(q);
> > > +		if (ret)
> > > +			return;
> > > +	}
> > >
> > >   	q->selected = spi_get_chipselect(spi, 0);
> > >
> > > --
> > > 2.43.0
> > >
>