[PATCH v2 1/1] riscv: dts: spacemit: add Ethernet and PDMA to OrangePi RV2

michael.opdenacker at rootcommit.com michael.opdenacker at rootcommit.com
Wed Oct 22 13:18:38 PDT 2025


From: Michael Opdenacker <michael.opdenacker at rootcommit.com>

The OrangePi RV2 board ships two RGMII ethernet ports.
Each has an external Motorcomm YT8531C PHY attached, the PHY uses GPIO
for reset pin control.

Enable PDMA for the SpacemiT K1-based SoC in the OrangePi RV2 board.

Signed-off-by: Michael Opdenacker <michael.opdenacker at rootcommit.com>
CC: Emil Renner Berthing <emil.renner.berthing at gmail.com>
CC: Yixun Lan <dlan at gentoo.org>
CC: Vivian Wang <wangruikang at iscas.ac.cn>
---
 .../boot/dts/spacemit/k1-orangepi-rv2.dts     | 52 +++++++++++++++++++
 1 file changed, 52 insertions(+)

diff --git a/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts b/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
index 337240ebb7b7..41dc8e35e6eb 100644
--- a/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
+++ b/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
@@ -15,6 +15,8 @@ / {
 
 	aliases {
 		serial0 = &uart0;
+		ethernet0 = &eth0;
+		ethernet1 = &eth1;
 	};
 
 	chosen {
@@ -33,6 +35,56 @@ led1 {
 	};
 };
 
+&eth0 {
+	phy-handle = <&rgmii0>;
+	phy-mode = "rgmii-id";
+	pinctrl-names = "default";
+	pinctrl-0 = <&gmac0_cfg>;
+	rx-internal-delay-ps = <0>;
+	tx-internal-delay-ps = <0>;
+	status = "okay";
+
+	mdio-bus {
+		#address-cells = <0x1>;
+		#size-cells = <0x0>;
+
+		reset-gpios = <&gpio K1_GPIO(110) GPIO_ACTIVE_LOW>;
+		reset-delay-us = <10000>;
+		reset-post-delay-us = <100000>;
+
+		rgmii0: phy at 1 {
+			reg = <0x1>;
+		};
+	};
+};
+
+&eth1 {
+	phy-handle = <&rgmii1>;
+	phy-mode = "rgmii-id";
+	pinctrl-names = "default";
+	pinctrl-0 = <&gmac1_cfg>;
+	rx-internal-delay-ps = <0>;
+	tx-internal-delay-ps = <250>;
+	status = "okay";
+
+	mdio-bus {
+		#address-cells = <0x1>;
+		#size-cells = <0x0>;
+
+		reset-gpios = <&gpio K1_GPIO(115) GPIO_ACTIVE_LOW>;
+		reset-delay-us = <10000>;
+		reset-post-delay-us = <100000>;
+
+		rgmii1: phy at 1 {
+			reg = <0x1>;
+		};
+	};
+};
+
+&pdma {
+	status = "okay";
+};
+
 &uart0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&uart0_2_cfg>;



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