[PATCH] riscv: asm: use .insn for making custom instructioons

Paul Walmsley pjw at kernel.org
Fri Oct 17 11:25:20 PDT 2025


Hi Ben,

On Fri, 17 Oct 2025, Ben Dooks wrote:

> Using .word breaks with big endian builds, making something which
> is not a valid or worse an instruction or pair that does something
> which is not intended.
> 
> It would seem sensible to add an ASM_INSN() wrapper for anyone to
> use for hand assembly of instructions.

Looking at the GNU as documentation for RISC-V:

  https://sourceware.org/binutils/docs/as/RISC_002dV_002dDirectives.html

it seems that RISC-V .insn supports several argument formats that .4byte 
wouldn't.  So it seems this is only applicable for opcodes specified as 
hex bytes?  Might be worth adding that to the macro name in some form.  

Also, looks like this is missing the opcodes added in commit 
1d4ce63e338fc.  If you update this one, could you please add those as 
well?

thanks


- Paul



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