[PATCH v2 0/7] Introduce SpacemiT K1 PCIe phy and host controller
Aurelien Jarno
aurelien at aurel32.net
Thu Oct 16 09:47:56 PDT 2025
Hi Alex,
On 2025-10-13 10:35, Alex Elder wrote:
> This series introduces a PHY driver and a PCIe driver to support PCIe
> on the SpacemiT K1 SoC. The PCIe implementation is derived from a
> Synopsys DesignWare PCIe IP. The PHY driver supports one combination
> PCIe/USB PHY as well as two PCIe-only PHYs. The combo PHY port uses
> one PCIe lane, and the other two ports each have two lanes. All PCIe
> ports operate at 5 GT/second.
>
> The PCIe PHYs must be configured using a value that can only be
> determined using the combo PHY, operating in PCIe mode. To allow
> that PHY to be used for USB, the calibration step is performed by
> the PHY driver automatically at probe time. Once this step is done,
> the PHY can be used for either PCIe or USB.
>
> Version 2 of this series incorporates suggestions made during the
> review of version 1. Specific highlights are detailed below.
With the issues mentioned in patch 4 fixed, this patchset works fine for
me. That said I had to disable ASPM by passing pcie_aspm=off on the
command line, as it is now enabled by default since 6.18-rc1 [1]. At
this stage, I am not sure if it is an issue with my NVME drive or an
issue with the controller.
Regards
Aurelien
[1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=f3ac2ff14834a0aa056ee3ae0e4b8c641c579961
--
Aurelien Jarno GPG: 4096R/1DDD8C9B
aurelien at aurel32.net http://aurel32.net
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