[PATCH 05/18] riscv: asm: use .insn for making custom instructioons

[Andrew Jones]

On Thu, Oct 02, 2025 at 09:45:05AM -0500, Andrew Jones wrote:
> On Fri, Aug 22, 2025 at 05:52:35PM +0100, Ben Dooks wrote:
> > Using .word breaks with big endian builds, making something which
> > is not a valid or worse an instruction or pair that does something
> > which is not intended.
> > 
> > Signed-off-by: Ben Dooks <ben.dooks at codethink.co.uk>
> > ---
> >  arch/riscv/include/asm/insn-def.h | 7 +++++++
> >  1 file changed, 7 insertions(+)
> > 
> > diff --git a/arch/riscv/include/asm/insn-def.h b/arch/riscv/include/asm/insn-def.h
> > index d5adbaec1d01..2a3019bc1a3b 100644
> > --- a/arch/riscv/include/asm/insn-def.h
> > +++ b/arch/riscv/include/asm/insn-def.h
> > @@ -256,10 +256,17 @@
> >  	INSN_S(OPCODE_OP_IMM, FUNC3(6), __RS2(3),		\
> >  	       SIMM12((offset) & 0xfe0), RS1(base))
> >  
> > +#ifndef CONFIG_AS_HAS_INSN
> >  #define RISCV_PAUSE	".4byte 0x100000f"
> >  #define ZAWRS_WRS_NTO	".4byte 0x00d00073"
> >  #define ZAWRS_WRS_STO	".4byte 0x01d00073"
> >  #define RISCV_NOP4	".4byte 0x00000013"
> > +#else
> > +#define RISCV_PAUSE	".insn 0x100000f"
> > +#define ZAWRS_WRS_NTO	".insn 0x00d00073"
> > +#define ZAWRS_WRS_STO	".insn 0x01d00073"
> > +#define RISCV_NOP4	".insn 0x00000013"
> > +#endif
> 
> I agree we should use .insn when possible because it provides validation
> and allows mapping symbols to identify the words as instructions. So ack
> to the change, but without adding a depends on AS_HAS_INSN to the riscv
> CPU_BIG_ENDIAN config, then the commit message should drop the reference
> to big endian for its motivation.
>

And Patch14 of this series looks good, but it should be squashed into this
one.

Thanks,
drew