[PATCH v5 1/2] dt-bindings: timer: mti,gcru

Krzysztof Kozlowski krzk at kernel.org
Mon Jul 14 00:24:59 PDT 2025


On Fri, Jul 11, 2025 at 11:56:45PM +0200, Aleksa Paunovic wrote:
> +$id: http://devicetree.org/schemas/timer/mti,gcru.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: GCR.U timer device for RISC-V platforms
> +
> +maintainers:
> +  - Aleksa Paunovic <aleksa.paunovic at htecgroup.com>
> +
> +description:
> +  The GCR.U memory region contains memory mapped shadow copies of
> +  mtime and hrtime Global Configuration Registers,
> +  which software can choose to make accessible from user mode.
> +
> +properties:
> +  compatible:
> +    const: mti,gcru

Is this architecture? vendor prefix suggests not. So is this for SoC?
Then why there are no SoC compatibles here instead?

Best regards,
Krzysztof




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