[PATCH v2 9/9] MAINTAINERS: Add entry for Andes SoC
Ben Zong-You Xie
ben717 at andestech.com
Fri Jul 11 06:30:25 PDT 2025
Add entry for Andes SoC maintainer and related files
Signed-off-by: Ben Zong-You Xie <ben717 at andestech.com>
---
MAINTAINERS | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index d79d546c2f95..3e16da28de50 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -21318,6 +21318,15 @@ F: drivers/irqchip/irq-riscv-intc.c
F: include/linux/irqchip/riscv-aplic.h
F: include/linux/irqchip/riscv-imsic.h
+RISC-V ANDES SoC Support
+M: Ben Zong-You Xie <ben717 at andestech.com>
+S: Maintained
+T: git: https://github.com/ben717-linux/linux
+F: Documentation/devicetree/bindings/interrupt-controller/andestech,plicsw.yaml
+F: Documentation/devicetree/bindings/riscv/andes.yaml
+F: Documentation/devicetree/bindings/timer/andestech,plmt0.yaml
+F: arch/riscv/boot/dts/andes/
+
RISC-V ARCHITECTURE
M: Paul Walmsley <paul.walmsley at sifive.com>
M: Palmer Dabbelt <palmer at dabbelt.com>
--
2.34.1
More information about the linux-riscv
mailing list