[PATCH] dt-bindings: riscv: Add SiFive vendor extensions description
Nick Hu
nick.hu at sifive.com
Wed Jul 9 21:57:59 PDT 2025
On Thu, Jul 10, 2025 at 12:00 AM Conor Dooley <conor at kernel.org> wrote:
>
> On Tue, Jul 08, 2025 at 02:52:42PM +0800, Nick Hu wrote:
> > Add description for SiFive vendor extensions "xsfcflushdlone",
> > "xsfpgflushdlone" and "xsfcease".
> >
> > Signed-off-by: Nick Hu <nick.hu at sifive.com>
>
> You have this, but no user or anything along with it. What's actually
> making use of this? If it's just for the SBI impl or w/e then say that.
>
It's for the SBI implementation. I'll update it in the commit message.
Thanks!
Best Regard,
Nick
> > ---
> > .../devicetree/bindings/riscv/extensions.yaml | 18 ++++++++++++++++++
> > 1 file changed, 18 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml
> > index 72c1b063fdfe..10c37c61243d 100644
> > --- a/Documentation/devicetree/bindings/riscv/extensions.yaml
> > +++ b/Documentation/devicetree/bindings/riscv/extensions.yaml
> > @@ -626,6 +626,24 @@ properties:
> > https://www.andestech.com/wp-content/uploads/AX45MP-1C-Rev.-5.0.0-Datasheet.pdf
> >
> > # SiFive
> > + - const: xsfcease
> > + description:
> > + SiFive CEASE Instruction Extensions Specification.
> > + See more details in
> > + https://www.sifive.com/document-file/freedom-u740-c000-manual
> > +
> > + - const: xsfcflushdlone
> > + description:
> > + SiFive L1D Cache Flush Instruction Extensions Specification.
> > + See more details in
> > + https://www.sifive.com/document-file/freedom-u740-c000-manual
> > +
> > + - const: xsfpgflushdlone
> > + description:
> > + SiFive PGFLUSH Instruction Extensions for the power management. The
> > + CPU will flush the L1D and enter the cease state after executing
> > + the instruction.
> > +
> > - const: xsfqmaccdod
> > description:
> > SiFive Int8 Matrix Multiplication Extensions Specification.
> > --
> > 2.17.1
> >
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