[PATCH 2/2] irqchip/riscv-aplic: Save and restore APLIC registers
Nick Hu
nick.hu at sifive.com
Tue Jul 8 19:55:16 PDT 2025
The APLIC may be powered down when the CPUs enter a deep sleep state.
Therefore adding the APLIC save and restore functions to save and
restore the states of APLIC.
Signed-off-by: Nick Hu <nick.hu at sifive.com>
Reviewed-by: Yong-Xuan Wang <yongxuan.wang at sifive.com>
Reviewed-by: Cyan Yang <cyan.yang at sifive.com>
---
drivers/irqchip/irq-riscv-aplic-direct.c | 14 ++-
drivers/irqchip/irq-riscv-aplic-main.c | 143 +++++++++++++++++++++++
drivers/irqchip/irq-riscv-aplic-main.h | 12 ++
drivers/irqchip/irq-riscv-aplic-msi.c | 3 +-
4 files changed, 170 insertions(+), 2 deletions(-)
diff --git a/drivers/irqchip/irq-riscv-aplic-direct.c b/drivers/irqchip/irq-riscv-aplic-direct.c
index 205ad61d15e4..df42f979d02c 100644
--- a/drivers/irqchip/irq-riscv-aplic-direct.c
+++ b/drivers/irqchip/irq-riscv-aplic-direct.c
@@ -8,6 +8,7 @@
#include <linux/bitfield.h>
#include <linux/bitops.h>
#include <linux/cpu.h>
+#include <linux/cpumask.h>
#include <linux/interrupt.h>
#include <linux/irqchip.h>
#include <linux/irqchip/chained_irq.h>
@@ -171,6 +172,16 @@ static void aplic_idc_set_delivery(struct aplic_idc *idc, bool en)
writel(de, idc->regs + APLIC_IDC_IDELIVERY);
}
+void aplic_direct_restore(struct aplic_priv *priv)
+{
+ struct aplic_direct *direct =
+ container_of(priv, struct aplic_direct, priv);
+ int cpu;
+
+ for_each_cpu(cpu, &direct->lmask)
+ aplic_idc_set_delivery(per_cpu_ptr(&aplic_idcs, cpu), true);
+}
+
static int aplic_direct_dying_cpu(unsigned int cpu)
{
if (aplic_direct_parent_irq)
@@ -343,5 +354,6 @@ int aplic_direct_setup(struct device *dev, void __iomem *regs)
dev_info(dev, "%d interrupts directly connected to %d CPUs\n",
priv->nr_irqs, priv->nr_idcs);
- return 0;
+ /* Add the aplic_priv to the list */
+ return aplic_add(dev, priv);
}
diff --git a/drivers/irqchip/irq-riscv-aplic-main.c b/drivers/irqchip/irq-riscv-aplic-main.c
index 93e7c51f944a..9054ce7a7256 100644
--- a/drivers/irqchip/irq-riscv-aplic-main.c
+++ b/drivers/irqchip/irq-riscv-aplic-main.c
@@ -12,10 +12,130 @@
#include <linux/of.h>
#include <linux/of_irq.h>
#include <linux/platform_device.h>
+#include <linux/pm_domain.h>
+#include <linux/pm_runtime.h>
#include <linux/printk.h>
+#include <linux/syscore_ops.h>
#include "irq-riscv-aplic-main.h"
+static LIST_HEAD(aplics);
+
+static void aplic_restore(struct aplic_priv *priv)
+{
+ int i;
+ u32 clrip;
+
+ writel(priv->saved_domaincfg, priv->regs + APLIC_DOMAINCFG);
+#ifdef CONFIG_RISCV_M_MODE
+ writel(priv->saved_msiaddr, priv->regs + APLIC_xMSICFGADDR);
+ writel(priv->saved_msiaddrh, priv->regs + APLIC_xMSICFGADDRH);
+#endif
+ for (i = 1; i <= priv->nr_irqs; i++) {
+ writel(priv->saved_sourcecfg[i - 1],
+ priv->regs + APLIC_SOURCECFG_BASE +
+ (i - 1) * sizeof(u32));
+ writel(priv->saved_target[i - 1],
+ priv->regs + APLIC_TARGET_BASE +
+ (i - 1) * sizeof(u32));
+ }
+
+ for (i = 0; i <= priv->nr_irqs; i += 32) {
+ writel(-1U, priv->regs + APLIC_CLRIE_BASE +
+ (i / 32) * sizeof(u32));
+ writel(priv->saved_ie[i / 32],
+ priv->regs + APLIC_SETIE_BASE +
+ (i / 32) * sizeof(u32));
+ }
+
+ if (priv->nr_idcs) {
+ aplic_direct_restore(priv);
+ } else {
+ /* Re-trigger the interrupts */
+ for (i = 0; i <= priv->nr_irqs; i += 32) {
+ clrip = readl(priv->regs + APLIC_CLRIP_BASE +
+ (i / 32) * sizeof(u32));
+ writel(clrip, priv->regs + APLIC_SETIP_BASE +
+ (i / 32) * sizeof(u32));
+ }
+ }
+}
+
+static void aplic_save(struct aplic_priv *priv)
+{
+ int i;
+
+ for (i = 1; i <= priv->nr_irqs; i++) {
+ priv->saved_target[i - 1] = readl(priv->regs +
+ APLIC_TARGET_BASE +
+ (i - 1) * sizeof(u32));
+ }
+
+ for (i = 0; i <= priv->nr_irqs; i += 32) {
+ priv->saved_ie[i / 32] = readl(priv->regs +
+ APLIC_SETIE_BASE +
+ (i / 32) * sizeof(u32));
+ }
+}
+
+static int aplic_syscore_suspend(void)
+{
+ struct aplic_priv *priv;
+
+ list_for_each_entry(priv, &aplics, list) {
+ aplic_save(priv);
+ }
+
+ return 0;
+}
+
+static void aplic_syscore_resume(void)
+{
+ struct aplic_priv *priv;
+
+ list_for_each_entry(priv, &aplics, list) {
+ aplic_restore(priv);
+ }
+}
+
+static struct syscore_ops aplic_syscore_ops = {
+ .suspend = aplic_syscore_suspend,
+ .resume = aplic_syscore_resume,
+};
+
+static int aplic_notifier(struct notifier_block *nb, unsigned long action,
+ void *data)
+{
+ struct aplic_priv *priv = container_of(nb, struct aplic_priv, genpd_nb);
+
+ switch (action) {
+ case GENPD_NOTIFY_PRE_OFF:
+ aplic_save(priv);
+ break;
+ case GENPD_NOTIFY_ON:
+ aplic_restore(priv);
+ break;
+ default:
+ break;
+ }
+
+ return 0;
+}
+
+int aplic_add(struct device *dev, struct aplic_priv *priv)
+{
+ int ret;
+
+ list_add(&priv->list, &aplics);
+ /* Add genpd notifier */
+ priv->genpd_nb.notifier_call = aplic_notifier;
+ ret = dev_pm_genpd_add_notifier(dev, &priv->genpd_nb);
+ if (!ret)
+ return devm_pm_runtime_enable(dev);
+
+ return ret == -ENODEV || ret == -EOPNOTSUPP ? 0 : ret;
+}
+
void aplic_irq_unmask(struct irq_data *d)
{
struct aplic_priv *priv = irq_data_get_irq_chip_data(d);
@@ -59,6 +179,7 @@ int aplic_irq_set_type(struct irq_data *d, unsigned int type)
sourcecfg = priv->regs + APLIC_SOURCECFG_BASE;
sourcecfg += (d->hwirq - 1) * sizeof(u32);
writel(val, sourcecfg);
+ priv->saved_sourcecfg[d->hwirq - 1] = val;
return 0;
}
@@ -95,6 +216,8 @@ void aplic_init_hw_global(struct aplic_priv *priv, bool msi_mode)
valh |= FIELD_PREP(APLIC_xMSICFGADDRH_HHXS, priv->msicfg.hhxs);
writel(val, priv->regs + APLIC_xMSICFGADDR);
writel(valh, priv->regs + APLIC_xMSICFGADDRH);
+ priv->saved_msiaddr = val;
+ priv->saved_msiaddrh = valH;
}
#endif
@@ -106,6 +229,7 @@ void aplic_init_hw_global(struct aplic_priv *priv, bool msi_mode)
writel(val, priv->regs + APLIC_DOMAINCFG);
if (readl(priv->regs + APLIC_DOMAINCFG) != val)
dev_warn(priv->dev, "unable to write 0x%x in domaincfg\n", val);
+ priv->saved_domaincfg = val;
}
static void aplic_init_hw_irqs(struct aplic_priv *priv)
@@ -176,6 +300,23 @@ int aplic_setup_priv(struct aplic_priv *priv, struct device *dev, void __iomem *
/* Setup initial state APLIC interrupts */
aplic_init_hw_irqs(priv);
+ /* For power management */
+ priv->saved_target = devm_kzalloc(dev, priv->nr_irqs * sizeof(u32),
+ GFP_KERNEL);
+ if (!priv->saved_target)
+ return -ENOMEM;
+
+ priv->saved_sourcecfg = devm_kzalloc(dev, priv->nr_irqs * sizeof(u32),
+ GFP_KERNEL);
+ if (!priv->saved_sourcecfg)
+ return -ENOMEM;
+
+ priv->saved_ie = devm_kzalloc(dev,
+ DIV_ROUND_UP(priv->nr_irqs, 32) * sizeof(u32),
+ GFP_KERNEL);
+ if (!priv->saved_ie)
+ return -ENOMEM;
+
return 0;
}
@@ -209,6 +350,8 @@ static int aplic_probe(struct platform_device *pdev)
if (rc)
dev_err_probe(dev, rc, "failed to setup APLIC in %s mode\n",
msi_mode ? "MSI" : "direct");
+ else
+ register_syscore_ops(&aplic_syscore_ops);
#ifdef CONFIG_ACPI
if (!acpi_disabled)
diff --git a/drivers/irqchip/irq-riscv-aplic-main.h b/drivers/irqchip/irq-riscv-aplic-main.h
index b0ad8cde69b1..969319242dbc 100644
--- a/drivers/irqchip/irq-riscv-aplic-main.h
+++ b/drivers/irqchip/irq-riscv-aplic-main.h
@@ -31,6 +31,16 @@ struct aplic_priv {
u32 acpi_aplic_id;
void __iomem *regs;
struct aplic_msicfg msicfg;
+ struct notifier_block genpd_nb;
+ struct list_head list;
+ u32 *saved_target;
+ u32 *saved_sourcecfg;
+ u32 *saved_ie;
+ u32 saved_domaincfg;
+#ifdef CONFIG_RISCV_M_MODE
+ u32 saved_msiaddr;
+ u32 saved_msiaddrh;
+#endif
};
void aplic_irq_unmask(struct irq_data *d);
@@ -39,7 +49,9 @@ int aplic_irq_set_type(struct irq_data *d, unsigned int type);
int aplic_irqdomain_translate(struct irq_fwspec *fwspec, u32 gsi_base,
unsigned long *hwirq, unsigned int *type);
void aplic_init_hw_global(struct aplic_priv *priv, bool msi_mode);
+void aplic_direct_restore(struct aplic_priv *priv);
int aplic_setup_priv(struct aplic_priv *priv, struct device *dev, void __iomem *regs);
+int aplic_add(struct device *dev, struct aplic_priv *priv);
int aplic_direct_setup(struct device *dev, void __iomem *regs);
#ifdef CONFIG_RISCV_APLIC_MSI
int aplic_msi_setup(struct device *dev, void __iomem *regs);
diff --git a/drivers/irqchip/irq-riscv-aplic-msi.c b/drivers/irqchip/irq-riscv-aplic-msi.c
index fb8d1838609f..c9b4f7d5e6ea 100644
--- a/drivers/irqchip/irq-riscv-aplic-msi.c
+++ b/drivers/irqchip/irq-riscv-aplic-msi.c
@@ -281,5 +281,6 @@ int aplic_msi_setup(struct device *dev, void __iomem *regs)
pa = priv->msicfg.base_ppn << APLIC_xMSICFGADDR_PPN_SHIFT;
dev_info(dev, "%d interrupts forwarded to MSI base %pa\n", priv->nr_irqs, &pa);
- return 0;
+ /* Add the aplic_priv to the list */
+ return aplic_add(dev, priv);
}
--
2.17.1
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