[PATCH 0/2] riscv: mm: Use mmu-type from FDT as SATP mode limit
patchwork-bot+linux-riscv at kernel.org
patchwork-bot+linux-riscv at kernel.org
Wed Aug 6 10:15:39 PDT 2025
Hello:
This series was applied to riscv/linux.git (for-next)
by Alexandre Ghiti <alexghiti at rivosinc.com>:
On Tue, 22 Jul 2025 00:53:09 +0800 you wrote:
> This patch series improves RISC-V kernel compatibility and robustness by
> refining how the SATP mode is determined during early boot. Some RISC-V
> implementations, such as the Anlogic DR1V90 FPSoC with a UX900 RISC-V
> core designed by Nuclei, which I am currently attempting to run the
> mainline kernel on [1], may hang when attempting to write an unsupported
> SATP mode.
>
> [...]
Here is the summary with links:
- [1/2] riscv: mm: Return intended SATP mode for noXlvl options
https://git.kernel.org/riscv/c/75ede0a8e07b
- [2/2] riscv: mm: Use mmu-type from FDT to limit SATP mode
https://git.kernel.org/riscv/c/a870d4f78f11
You are awesome, thank you!
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