[PATCH 1/2] riscv: Include riscv_set_icache_flush_ctx prctl
Charlie Jenkins
charlie at rivosinc.com
Mon Nov 27 10:15:59 PST 2023
On Mon, Nov 27, 2023 at 10:44:54AM +0000, Conor Dooley wrote:
> On Wed, Nov 22, 2023 at 05:03:20PM -0800, Charlie Jenkins wrote:
> > +
> > +/**
> > + * Enable userspace to emit icache flushing instructions.
> > + *
> > + * When in per-process context, there may be multiple threads using the same mm.
> > + * Therefore, the icache can never be assumed clean when. Multiple threads in
> > + * the process may modify instructions in the mm concurrently.
> > + *
> > + * In per-thread context, it can be assumed that all modifications to
> > + * instructions in memory will be performed by this thread. When the thread is
> > + * migrated the icache will be flushed.
> > + *
> > + * @arg arg: Sets the type of context
> > + * - PR_RISCV_CTX_SW_FENCEI: Allow fence.i in userspace. Another fence.i will
> > + * emitted on thread/process migration.
> > + * @arg per_thread: When set to 0, will use the default behavior of setting the
> > + * icache flush context per process. When set to 1, will use a per thread
> > + * context.
> > + */
>
> FYI, this is not valid kerneldoc and breaks allmodconfig builds:
> arch/riscv/mm/cacheflush.c:159: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst
>
> > +int riscv_set_icache_flush_ctx(unsigned long ctx, unsigned long per_thread)
>
>
> Cheers,
> Conor.
Thank you, I will fix that in the next version.
- Charlie
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