[PATCH v11 19/20] PCI: starfive: Add JH7110 PCIe controller

Minda Chen minda.chen at starfivetech.com
Mon Nov 20 16:52:21 PST 2023



On 2023/11/21 2:23, Bjorn Helgaas wrote:
> On Mon, Nov 20, 2023 at 06:07:31PM +0800, Minda Chen wrote:
>> On 2023/11/15 19:49, Minda Chen wrote:
>> > Add StarFive JH7110 SoC PCIe controller platform driver codes, JH7110
>> > with PLDA host PCIe core.
>> ...
> 
>> > --- a/drivers/pci/pci.h
>> > +++ b/drivers/pci/pci.h
>> > @@ -22,6 +22,13 @@
>> >   */
>> >  #define PCIE_PME_TO_L2_TIMEOUT_US	10000
>> >  
>> > +/*
>> > + * PCIe r6.0, sec 6.6.1, <Conventional Reset>
>> > + * Requires a minimum waiting of 100ms before sending a configuration
>> > + * request to the device.
>> > + */
>> > +#define PCIE_BEFORE_CONFIG_REQUEST_WAIT_MS	100
>> > +
>> >  extern const unsigned char pcie_link_speed[];
>> >  extern bool pci_early_dump;
>> >  
>> Hi Bjorn
>>   I have not checked this carefully.
>>   I think the change of pci.h should be moved to a indepent patch.
>>   Could you approve this? Kevin will commit a new patch for this.
>>   Next version I will remove this change. 
> 
> Yes, I think it makes sense to add that #define in a separate patch.
> 
> Please trim out the unnecessary context; there's no need for readers
> to scroll through the entire driver to get to the useful part, which
> is just the last dozen lines or so.
> 
> Bjorn

Thanks. I will notice this next time. 
Happy Thanksgiving! Wish you and Rob have a good holiday.

BTW. Could you give any comments to Refactoring patches (patch 2 - patch 16)and PLDA patch(patch 17) next week?  Thanks.



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