[PATCH v2 12/12] [UNTESTED] riscv: dts: starfive: beaglev-starlight: Enable gmac

[Cristian Ciocaltea]

On 11/17/23 10:49, Cristian Ciocaltea wrote:
> On 11/17/23 10:37, Geert Uytterhoeven wrote:
>> On Thu, Nov 16, 2023 at 6:55 PM Conor Dooley <conor at kernel.org> wrote:
>>> On Thu, Nov 16, 2023 at 03:15:46PM +0200, Cristian Ciocaltea wrote:
>>>> On 10/30/23 00:53, Cristian Ciocaltea wrote:
>>>>> On 10/29/23 20:46, Andrew Lunn wrote:
>>>>>> On Sun, Oct 29, 2023 at 06:27:12AM +0200, Cristian Ciocaltea wrote:
>>>>>>> The BeagleV Starlight SBC uses a Microchip KSZ9031RNXCA PHY supporting
>>>>>>> RGMII-ID.
>>>>>>>
>>>>>>> TODO: Verify if manual adjustment of the RX internal delay is needed. If
>>>>>>> yes, add the mdio & phy sub-nodes.
>>>>>>
>>>>>> Please could you try to get this tested. It might shed some light on
>>>>>> what is going on here, since it is a different PHY.
>>>>>
>>>>> Actually, this is the main reason I added the patch. I don't have access
>>>>> to this board, so it would be great if we could get some help with testing.
>>>>
>>>> @Emil, @Conor: Any idea who might help us with a quick test on the
>>>> BeagleV Starlight board?
>>>
>>> I don't have one & I am not sure if Emil does. Geert (CCed) should have
>>
>> I believe Esmil has.
>>
>>> one though. Is there a specific test you need to have done?
>>
>> I gave it a try, on top of latest renesas-drivers[1].

[...]

>>
>> Looks like it needs more non-coherent support before we can test
>> Ethernet.
> 
> Hi Geert,
> 
> Thanks for taking the time to test this!
> 
> Could you please check if the following are enabled in your kernel config:
> 
>   CONFIG_DMA_GLOBAL_POOL
>   CONFIG_RISCV_DMA_NONCOHERENT
>   CONFIG_RISCV_NONSTANDARD_CACHE_OPS
>   CONFIG_SIFIVE_CCACHE

Also please note the series requires the SiFive Composable Cache 
controller patches provided by Emil [1].

[1]: https://lore.kernel.org/all/20231031141444.53426-1-emil.renner.berthing@canonical.com/