[RFC PATCH V2 11/38] riscv: u64ilp32: Enable user space runtime switch

[guoren at kernel.org]

From: Guo Ren <guoren at linux.alibaba.com>

This patch didn't introduce any new syscall table but reused the
existing rv32 implementation to ease the maintenance of the kernel side.
Unify the UXL mode setting by ELF e_flags to support u64ilp32 &
u32ilp32.

Signed-off-by: Guo Ren <guoren at linux.alibaba.com>
Signed-off-by: Guo Ren <guoren at kernel.org>
---
 arch/riscv/include/asm/csr.h         | 2 --
 arch/riscv/include/asm/elf.h         | 7 ++++++-
 arch/riscv/include/asm/syscall.h     | 2 +-
 arch/riscv/include/asm/thread_info.h | 1 +
 arch/riscv/kernel/process.c          | 4 +---
 5 files changed, 9 insertions(+), 7 deletions(-)

diff --git a/arch/riscv/include/asm/csr.h b/arch/riscv/include/asm/csr.h
index 7bac43a3176e..638b7a836acc 100644
--- a/arch/riscv/include/asm/csr.h
+++ b/arch/riscv/include/asm/csr.h
@@ -44,11 +44,9 @@
 #define SR_SD		_AC(0x8000000000000000, UL) /* FS/VS/XS dirty */
 #endif
 
-#ifdef CONFIG_64BIT
 #define SR_UXL		_AC(0x300000000, UL) /* XLEN mask for U-mode */
 #define SR_UXL_32	_AC(0x100000000, UL) /* XLEN = 32 for U-mode */
 #define SR_UXL_64	_AC(0x200000000, UL) /* XLEN = 64 for U-mode */
-#endif
 
 /* SATP flags */
 #ifndef CONFIG_64BIT
diff --git a/arch/riscv/include/asm/elf.h b/arch/riscv/include/asm/elf.h
index c24280774caf..5b2bf1a7cb59 100644
--- a/arch/riscv/include/asm/elf.h
+++ b/arch/riscv/include/asm/elf.h
@@ -127,18 +127,23 @@ do {							\
 		*(struct user_regs_struct *)regs;	\
 } while (0);
 
-#ifdef CONFIG_COMPAT
+#define EF_RISCV_64ILP32	0x20
 
 #define SET_PERSONALITY(ex)					\
 do {    if ((ex).e_ident[EI_CLASS] == ELFCLASS32)		\
 		set_thread_flag(TIF_32BIT);			\
 	else							\
 		clear_thread_flag(TIF_32BIT);			\
+	if ((ex).e_flags & EF_RISCV_64ILP32)			\
+		set_thread_flag(TIF_64ILP32);			\
+	else							\
+		clear_thread_flag(TIF_64ILP32);			\
 	if (personality(current->personality) != PER_LINUX32)	\
 		set_personality(PER_LINUX |			\
 			(current->personality & (~PER_MASK)));	\
 } while (0)
 
+#ifdef CONFIG_COMPAT
 #define COMPAT_ELF_ET_DYN_BASE		((TASK_SIZE_32 / 3) * 2)
 
 /* rv32 registers */
diff --git a/arch/riscv/include/asm/syscall.h b/arch/riscv/include/asm/syscall.h
index 0148c6bd9675..a1122b88c362 100644
--- a/arch/riscv/include/asm/syscall.h
+++ b/arch/riscv/include/asm/syscall.h
@@ -81,7 +81,7 @@ static inline void syscall_handler(struct pt_regs *regs, ulong syscall)
 	syscall_t fn;
 
 #ifdef CONFIG_COMPAT
-	if ((regs->status & SR_UXL) == SR_UXL_32)
+	if (test_thread_flag(TIF_32BIT))
 		fn = compat_sys_call_table[syscall];
 	else
 #endif
diff --git a/arch/riscv/include/asm/thread_info.h b/arch/riscv/include/asm/thread_info.h
index 1833beb00489..61f7101aebb3 100644
--- a/arch/riscv/include/asm/thread_info.h
+++ b/arch/riscv/include/asm/thread_info.h
@@ -93,6 +93,7 @@ int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src);
 #define TIF_NOTIFY_SIGNAL	9	/* signal notifications exist */
 #define TIF_UPROBE		10	/* uprobe breakpoint or singlestep */
 #define TIF_32BIT		11	/* compat-mode 32bit process */
+#define TIF_64ILP32		12	/* 64ILP32 process */
 
 #define _TIF_NOTIFY_RESUME	(1 << TIF_NOTIFY_RESUME)
 #define _TIF_SIGPENDING		(1 << TIF_SIGPENDING)
diff --git a/arch/riscv/kernel/process.c b/arch/riscv/kernel/process.c
index 93057ca2e2a7..87bdb0d6dbf3 100644
--- a/arch/riscv/kernel/process.c
+++ b/arch/riscv/kernel/process.c
@@ -126,14 +126,12 @@ void start_thread(struct pt_regs *regs, unsigned long pc,
 	regs->epc = pc;
 	regs->sp = sp;
 
-#ifdef CONFIG_64BIT
 	regs->status &= ~SR_UXL;
 
-	if (is_compat_task())
+	if (test_thread_flag(TIF_32BIT) && !test_thread_flag(TIF_64ILP32))
 		regs->status |= SR_UXL_32;
 	else
 		regs->status |= SR_UXL_64;
-#endif
 }
 
 void flush_thread(void)
-- 
2.36.1