[PATCH v3 20/20] dt-bindings: riscv: add Zfa ISA extension description

[Clément Léger]

On 08/11/2023 15:59, Conor Dooley wrote:
> On Tue, Nov 07, 2023 at 11:55:56AM +0100, Clément Léger wrote:
>> Add description for the Zfa ISA extension[1] which can now be
>> reported through hwprobe for userspace usage.
> 
> FWIW, hwprobe is not relevant for the dt-bindings.
> 

Ok, since I'll resend a V4, I will remove this mention top hwprobe.

>> Link: https://drive.google.com/file/d/1VT6QIggpb59-8QRV266dEE4T8FZTxGq4/view [1]
>> Signed-off-by: Clément Léger <cleger at rivosinc.com>
> 
> Acked-by: Conor Dooley <conor.dooley at microchip.com>

Thanks,

Clément

> 
> Cheers,
> Conor.
> 
>> ---
>>  Documentation/devicetree/bindings/riscv/extensions.yaml | 6 ++++++
>>  1 file changed, 6 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml
>> index 87c7e3608217..dcba5380f923 100644
>> --- a/Documentation/devicetree/bindings/riscv/extensions.yaml
>> +++ b/Documentation/devicetree/bindings/riscv/extensions.yaml
>> @@ -214,6 +214,12 @@ properties:
>>              instructions as ratified at commit 6d33919 ("Merge pull request #158
>>              from hirooih/clmul-fix-loop-end-condition") of riscv-bitmanip.
>>  
>> +        - const: zfa
>> +          description:
>> +            The standard Zfa extension for additional floating point
>> +            instructions, as ratified in commit 056b6ff ("Zfa is ratified") of
>> +            riscv-isa-manual.
>> +
>>          - const: zfh
>>            description:
>>              The standard Zfh extension for 16-bit half-precision binary
>> -- 
>> 2.42.0
>>